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Searched refs:RCC_APBENR2_SPI1EN (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h952 SET_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
954 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
1000 #define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN)
1119 #define __HAL_RCC_SPI1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) != 0U)
1128 #define __HAL_RCC_SPI1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) == 0U)
Dstm32c0xx_ll_bus.h121 #define LL_APB1_GRP2_PERIPH_SPI1 RCC_APBENR2_SPI1EN
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1167 SET_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
1169 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
1213 #define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN)
1424 #define __HAL_RCC_SPI1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) != 0U)
1442 #define __HAL_RCC_SPI1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) == 0U)
Dstm32u0xx_ll_bus.h148 #define LL_APB1_GRP2_PERIPH_SPI1 RCC_APBENR2_SPI1EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1312 SET_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
1314 … tmpreg = READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN); \
1441 #define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN)
1673 #define __HAL_RCC_SPI1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) != 0U)
1685 #define __HAL_RCC_SPI1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR2, RCC_APBENR2_SPI1EN) == 0U)
Dstm32g0xx_ll_bus.h181 #define LL_APB2_GRP1_PERIPH_SPI1 RCC_APBENR2_SPI1EN
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4116 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32c031xx.h4276 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32c071xx.h4744 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4352 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g050xx.h4386 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g070xx.h4527 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g031xx.h4566 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g041xx.h4814 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g051xx.h4923 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g061xx.h5171 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g071xx.h5288 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g081xx.h5536 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g0b0xx.h5576 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g0c1xx.h6894 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32g0b1xx.h6646 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5437 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32u083xx.h6271 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro
Dstm32u073xx.h6007 #define RCC_APBENR2_SPI1EN RCC_APBENR2_SPI1EN_Msk macro