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Searched refs:RCC_APBENR1_PWREN (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h896 SET_BIT(RCC->APBENR1, RCC_APBENR1_PWREN); \
898 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN); \
922 #define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_PWREN)
1082 #define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN) != 0U)
1105 #define __HAL_RCC_PWR_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN) == 0U)
Dstm32c0xx_ll_bus.h109 #define LL_APB1_GRP1_PERIPH_PWR RCC_APBENR1_PWREN
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1043 SET_BIT(RCC->APBENR1, RCC_APBENR1_PWREN); \
1045 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN); \
1125 #define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_PWREN)
1336 #define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN) != 0U)
1398 #define __HAL_RCC_PWR_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN) == 0U)
Dstm32u0xx_ll_bus.h132 #define LL_APB1_GRP1_PERIPH_PWR RCC_APBENR1_PWREN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1246 SET_BIT(RCC->APBENR1, RCC_APBENR1_PWREN); \
1248 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN); \
1429 #define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_PWREN)
1584 #define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN) != 0U)
1648 #define __HAL_RCC_PWR_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_PWREN) == 0U)
Dstm32g0xx_ll_bus.h161 #define LL_APB1_GRP1_PERIPH_PWR RCC_APBENR1_PWREN
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_rcc.c629 if (HAL_IS_BIT_CLR(RCC->APBENR1, RCC_APBENR1_PWREN)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4105 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32c031xx.h4265 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32c071xx.h4733 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4341 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g050xx.h4375 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g070xx.h4516 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g031xx.h4549 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g041xx.h4797 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g051xx.h4903 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g061xx.h5151 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g071xx.h5268 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g081xx.h5516 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g0b0xx.h5565 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g0c1xx.h6874 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32g0b1xx.h6626 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5417 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32u083xx.h6251 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro
Dstm32u073xx.h5987 #define RCC_APBENR1_PWREN RCC_APBENR1_PWREN_Msk macro