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Searched refs:RCC_APBENR1_I2C1EN (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h870 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN); \
872 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN); \
917 #define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN)
1077 #define __HAL_RCC_I2C1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN) != 0U)
1100 #define __HAL_RCC_I2C1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN) == 0U)
Dstm32c0xx_ll_bus.h104 #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APBENR1_I2C1EN
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h994 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN); \
996 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN); \
1112 #define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN)
1322 #define __HAL_RCC_I2C1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN) != 0…
1384 #define __HAL_RCC_I2C1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN) == 0…
Dstm32u0xx_ll_bus.h124 #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APBENR1_I2C1EN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1162 SET_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN); \
1164 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN); \
1408 #define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN)
1569 #define __HAL_RCC_I2C1_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN) != 0U)
1633 #define __HAL_RCC_I2C1_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_I2C1EN) == 0U)
Dstm32g0xx_ll_bus.h146 #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APBENR1_I2C1EN
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4099 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32c031xx.h4259 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32c071xx.h4724 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4332 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g050xx.h4366 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g070xx.h4507 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g031xx.h4540 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g041xx.h4788 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g051xx.h4894 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g061xx.h5142 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g071xx.h5250 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g081xx.h5498 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g0b0xx.h5553 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g0c1xx.h6853 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32g0b1xx.h6605 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5405 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32u083xx.h6233 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro
Dstm32u073xx.h5969 #define RCC_APBENR1_I2C1EN RCC_APBENR1_I2C1EN_Msk macro