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Searched refs:PWR_SR1_WUF5_Pos (Results 1 – 25 of 58) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_hal_pwr_ex.h155 #define PWR_FLAG_WUF5 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF5_Pos) /*!< Wakeup…
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_pwr_ex.h340 #define PWR_FLAG_WUF5 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF5_Pos) /*!< Wakeup ev…
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h3903 #define PWR_SR1_WUF5_Pos (4U) macro
3904 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h3666 #define PWR_SR1_WUF5_Pos (4U) macro
3667 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g071xx.h4365 #define PWR_SR1_WUF5_Pos (4U) macro
4366 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g081xx.h4601 #define PWR_SR1_WUF5_Pos (4U) macro
4602 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g0b0xx.h4444 #define PWR_SR1_WUF5_Pos (4U) macro
4445 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g0c1xx.h5648 #define PWR_SR1_WUF5_Pos (4U) macro
5649 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g0b1xx.h5412 #define PWR_SR1_WUF5_Pos (4U) macro
5413 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4474 #define PWR_SR1_WUF5_Pos (4U) macro
4475 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32u083xx.h5137 #define PWR_SR1_WUF5_Pos (4U) macro
5138 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32u073xx.h4879 #define PWR_SR1_WUF5_Pos (4U) macro
4880 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6421 #define PWR_SR1_WUF5_Pos (4U) macro
6422 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g411xc.h6586 #define PWR_SR1_WUF5_Pos (4U) macro
6587 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g441xx.h6775 #define PWR_SR1_WUF5_Pos (4U) macro
6776 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32gbk1cb.h6540 #define PWR_SR1_WUF5_Pos (4U) macro
6541 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g431xx.h6554 #define PWR_SR1_WUF5_Pos (4U) macro
6555 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g4a1xx.h6939 #define PWR_SR1_WUF5_Pos (4U) macro
6940 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g491xx.h6718 #define PWR_SR1_WUF5_Pos (4U) macro
6719 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g473xx.h7303 #define PWR_SR1_WUF5_Pos (4U) macro
7304 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32g471xx.h6789 #define PWR_SR1_WUF5_Pos (4U) macro
6790 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5123 #define PWR_SR1_WUF5_Pos (4U) macro
5124 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32l412xx.h4907 #define PWR_SR1_WUF5_Pos (4U) macro
4908 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb55xx.h6413 #define PWR_SR1_WUF5_Pos (4U) macro
6414 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */
Dstm32wb5mxx.h6413 #define PWR_SR1_WUF5_Pos (4U) macro
6414 #define PWR_SR1_WUF5_Msk (0x1UL << PWR_SR1_WUF5_Pos) /*!< 0x00000010 */

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