/hal_stm32-latest/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 3596 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 3597 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32c031xx.h | 3603 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 3604 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32c071xx.h | 3895 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 3896 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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/hal_stm32-latest/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 3627 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 3628 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g050xx.h | 3646 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 3647 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g070xx.h | 3661 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 3662 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g031xx.h | 3803 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 3804 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g041xx.h | 4039 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4040 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g051xx.h | 4139 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4140 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g061xx.h | 4375 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4376 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g071xx.h | 4360 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4361 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g081xx.h | 4596 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4597 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32g0b0xx.h | 4436 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4437 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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/hal_stm32-latest/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 5422 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 5423 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Pin 2 [F…
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D | stm32wle5xx.h | 5422 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 5423 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Pin 2 [F…
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D | stm32wl5mxx.h | 6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 6199 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Pin 2 [F…
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D | stm32wl54xx.h | 6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 6199 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Pin 2 [F…
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D | stm32wl55xx.h | 6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 6199 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Pin 2 [F…
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/hal_stm32-latest/stm32cube/stm32wb0x/soc/ |
D | stm32wb05.h | 3294 #define PWR_SR1_WUF2_Msk (0x4UL) /*!< PWR SR1:… macro 3295 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk
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D | stm32wb07.h | 3372 #define PWR_SR1_WUF2_Msk (0x4UL) /*!< PWR SR1:… macro 3373 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk
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D | stm32wb09.h | 3322 #define PWR_SR1_WUF2_Msk (0x4UL) /*!< PWR SR1:… macro 3323 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk
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D | stm32wb06.h | 3372 #define PWR_SR1_WUF2_Msk (0x4UL) /*!< PWR SR1:… macro 3373 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk
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/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u031xx.h | 4466 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4467 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32u083xx.h | 5129 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 5130 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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D | stm32u073xx.h | 4871 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */ macro 4872 #define PWR_SR1_WUF2 PWR_SR1_WUF2_Msk /*!< Wakeup Flag 2 */
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