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Searched refs:PWR_SCR_CWUF2_Pos (Results 1 – 25 of 65) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h3626 #define PWR_SCR_CWUF2_Pos (1U) macro
3627 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32c031xx.h3633 #define PWR_SCR_CWUF2_Pos (1U) macro
3634 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32c071xx.h3931 #define PWR_SCR_CWUF2_Pos (1U) macro
3932 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h3663 #define PWR_SCR_CWUF2_Pos (1U) macro
3664 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g050xx.h3682 #define PWR_SCR_CWUF2_Pos (1U) macro
3683 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g070xx.h3700 #define PWR_SCR_CWUF2_Pos (1U) macro
3701 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g031xx.h3842 #define PWR_SCR_CWUF2_Pos (1U) macro
3843 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g041xx.h4078 #define PWR_SCR_CWUF2_Pos (1U) macro
4079 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g051xx.h4178 #define PWR_SCR_CWUF2_Pos (1U) macro
4179 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g061xx.h4414 #define PWR_SCR_CWUF2_Pos (1U) macro
4415 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g071xx.h4402 #define PWR_SCR_CWUF2_Pos (1U) macro
4403 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g081xx.h4638 #define PWR_SCR_CWUF2_Pos (1U) macro
4639 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g0b0xx.h4478 #define PWR_SCR_CWUF2_Pos (1U) macro
4479 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h5493 #define PWR_SCR_CWUF2_Pos (1U) macro
5494 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32wle5xx.h5493 #define PWR_SCR_CWUF2_Pos (1U) macro
5494 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32wl5mxx.h6277 #define PWR_SCR_CWUF2_Pos (1U) macro
6278 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32wl54xx.h6277 #define PWR_SCR_CWUF2_Pos (1U) macro
6278 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32wl55xx.h6277 #define PWR_SCR_CWUF2_Pos (1U) macro
6278 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h4522 #define PWR_SCR_CWUF2_Pos (1U) macro
4523 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32u083xx.h5188 #define PWR_SCR_CWUF2_Pos (1U) macro
5189 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32u073xx.h4930 #define PWR_SCR_CWUF2_Pos (1U) macro
4931 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6479 #define PWR_SCR_CWUF2_Pos (1U) macro
6480 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32g411xc.h6644 #define PWR_SCR_CWUF2_Pos (1U) macro
6645 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5178 #define PWR_SCR_CWUF2_Pos (1U) macro
5179 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */
Dstm32l412xx.h4962 #define PWR_SCR_CWUF2_Pos (1U) macro
4963 #define PWR_SCR_CWUF2_Msk (0x1UL << PWR_SCR_CWUF2_Pos) /*!< 0x00000002 */

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