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Searched refs:PWR_CR2_PLS_LEV5_Pos (Results 1 – 25 of 38) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6346 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6347 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g411xc.h6511 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6512 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g441xx.h6694 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6695 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32gbk1cb.h6459 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6460 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g431xx.h6473 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6474 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g4a1xx.h6858 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6859 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g491xx.h6637 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6638 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g473xx.h7222 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
7223 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g471xx.h6708 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
6709 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g483xx.h7443 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
7444 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g414xx.h10297 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
10298 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g474xx.h10792 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
10793 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32g484xx.h11013 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
11014 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5033 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
5034 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l412xx.h4817 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
4818 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l433xx.h8598 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
8599 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l451xx.h8766 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
8767 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l442xx.h8734 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
8735 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l431xx.h8509 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
8510 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l432xx.h8518 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
8519 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l443xx.h8814 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
8815 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l471xx.h9470 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
9471 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l452xx.h8832 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
8833 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l462xx.h9048 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
9049 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */
Dstm32l475xx.h9631 #define PWR_CR2_PLS_LEV5_Pos (1U) macro
9632 #define PWR_CR2_PLS_LEV5_Msk (0x5UL << PWR_CR2_PLS_LEV5_Pos) /*!< 0x0000000A */

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