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Searched refs:OENR (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_hrtim.c1391 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart()
1501 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT()
1642 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA()
1955 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart()
2056 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT()
2259 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_DMA()
3294 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart()
3395 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart_IT()
5059 hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); in HAL_HRTIM_WaveformOutputStart()
6189 if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_hrtim.c1546 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart()
1656 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT()
1797 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA()
2110 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart()
2211 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT()
2414 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_DMA()
3449 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart()
3550 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart_IT()
5204 hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); in HAL_HRTIM_WaveformOutputStart()
6333 if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_hrtim.c1575 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart()
1691 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT()
1838 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA()
2162 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart()
2269 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT()
2482 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_DMA()
3539 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart()
3646 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart_IT()
6333 hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); in HAL_HRTIM_WaveformOutputStart()
7717 if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_hrtim.h2791 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\
2798 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\
2805 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\
2812 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\
2819 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\
Dstm32h7xx_ll_hrtim.h1654 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput()
1716 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput()
1747 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_hrtim.h2823 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\
2830 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\
2837 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\
2844 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\
2851 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\
Dstm32f3xx_ll_hrtim.h1683 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput()
1745 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput()
1776 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_hrtim.h3865 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\
3872 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\
3879 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\
3886 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\
3893 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\
3900 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TFOEN_MASK) == (uint32_t)RESET)\
Dstm32g4xx_ll_hrtim.h2440 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput()
2510 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput()
2545 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f334x8.h480 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g414xx.h941 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32g474xx.h1084 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32g484xx.h1116 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h742xx.h1635 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h750xx.h1792 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h753xx.h1792 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h745xx.h1797 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h745xg.h1797 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h743xx.h1722 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h755xx.h1867 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h757xx.h1948 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h747xg.h1878 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
Dstm32h747xx.h1878 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member