/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_hal_hrtim.c | 1391 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart() 1501 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT() 1642 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA() 1955 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart() 2056 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT() 2259 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_DMA() 3294 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart() 3395 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart_IT() 5059 hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); in HAL_HRTIM_WaveformOutputStart() 6189 if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/ |
D | stm32f3xx_hal_hrtim.c | 1546 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart() 1656 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT() 1797 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA() 2110 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart() 2211 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT() 2414 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_DMA() 3449 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart() 3550 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart_IT() 5204 hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); in HAL_HRTIM_WaveformOutputStart() 6333 if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/ |
D | stm32g4xx_hal_hrtim.c | 1575 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart() 1691 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT() 1838 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA() 2162 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart() 2269 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT() 2482 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_DMA() 3539 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart() 3646 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart_IT() 6333 hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); in HAL_HRTIM_WaveformOutputStart() 7717 if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_hal_hrtim.h | 2791 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\ 2798 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\ 2805 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\ 2812 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\ 2819 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\
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D | stm32h7xx_ll_hrtim.h | 1654 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput() 1716 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput() 1747 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/ |
D | stm32f3xx_hal_hrtim.h | 2823 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\ 2830 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\ 2837 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\ 2844 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\ 2851 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\
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D | stm32f3xx_ll_hrtim.h | 1683 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput() 1745 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput() 1776 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_hal_hrtim.h | 3865 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\ 3872 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\ 3879 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\ 3886 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\ 3893 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\ 3900 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TFOEN_MASK) == (uint32_t)RESET)\
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D | stm32g4xx_ll_hrtim.h | 2440 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput() 2510 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput() 2545 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
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/hal_stm32-latest/stm32cube/stm32f3xx/soc/ |
D | stm32f334x8.h | 480 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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/hal_stm32-latest/stm32cube/stm32g4xx/soc/ |
D | stm32g414xx.h | 941 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32g474xx.h | 1084 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32g484xx.h | 1116 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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/hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
D | stm32h742xx.h | 1635 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h750xx.h | 1792 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h753xx.h | 1792 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h745xx.h | 1797 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h745xg.h | 1797 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h743xx.h | 1722 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h755xx.h | 1867 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h757xx.h | 1948 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h747xg.h | 1878 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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D | stm32h747xx.h | 1878 …__IO uint32_t OENR; /*!< HRTIM Output enable register, Address… member
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