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Searched refs:FMAC_CR_DMAREN (Results 1 – 25 of 42) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_fmac.h629 SET_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_EnableDMAReq_READ()
640 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_DisableDMAReq_READ()
651 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL); in LL_FMAC_IsEnabledDMAReq_READ()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_fmac.h629 SET_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_EnableDMAReq_READ()
640 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_DisableDMAReq_READ()
651 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL); in LL_FMAC_IsEnabledDMAReq_READ()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_fmac.h629 SET_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_EnableDMAReq_READ()
640 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_DisableDMAReq_READ()
651 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL); in LL_FMAC_IsEnabledDMAReq_READ()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_fmac.h629 SET_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_EnableDMAReq_READ()
640 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN); in LL_FMAC_DisableDMAReq_READ()
651 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL); in LL_FMAC_IsEnabledDMAReq_READ()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_fmac.c244 #define FMAC_DMA_REN FMAC_CR_DMAREN
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_fmac.c244 #define FMAC_DMA_REN FMAC_CR_DMAREN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_fmac.c244 #define FMAC_DMA_REN FMAC_CR_DMAREN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_fmac.c244 #define FMAC_DMA_REN FMAC_CR_DMAREN
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h4806 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g411xc.h4971 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g441xx.h5154 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32gbk1cb.h4919 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g431xx.h4933 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g4a1xx.h5318 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g491xx.h5097 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g473xx.h5303 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g471xx.h5168 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g483xx.h5524 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g414xx.h5402 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g474xx.h5436 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
Dstm32g484xx.h5657 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA read… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h8368 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA… macro
Dstm32u535xx.h7968 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA… macro
Dstm32u575xx.h8641 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h8182 #define FMAC_CR_DMAREN FMAC_CR_DMAREN_Msk /*!< Enable DMA… macro

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