1 /**
2 ******************************************************************************
3 * @file stm32h5xx_ll_fmac.h
4 * @author MCD Application Team
5 * @brief Header file of FMAC LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2023 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H5xx_LL_FMAC_H
21 #define STM32H5xx_LL_FMAC_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h5xx.h"
29
30 /** @addtogroup STM32H5xx_LL_Driver
31 * @{
32 */
33
34 #if defined(FMAC)
35
36 /** @defgroup FMAC_LL FMAC
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41 /* Exported constants --------------------------------------------------------*/
42 /** @defgroup FMAC_LL_Exported_Constants FMAC Exported Constants
43 * @{
44 */
45
46 /** @defgroup FMAC_LL_EC_GET_FLAG Get Flag Defines
47 * @brief Flag defines which can be used with LL_FMAC_ReadReg function
48 * @{
49 */
50 #define LL_FMAC_SR_SAT FMAC_SR_SAT /*!< Saturation Error Flag
51 (this helps in debugging a filter) */
52 #define LL_FMAC_SR_UNFL FMAC_SR_UNFL /*!< Underflow Error Flag */
53 #define LL_FMAC_SR_OVFL FMAC_SR_OVFL /*!< Overflow Error Flag */
54 #define LL_FMAC_SR_X1FULL FMAC_SR_X1FULL /*!< X1 Buffer Full Flag */
55 #define LL_FMAC_SR_YEMPTY FMAC_SR_YEMPTY /*!< Y Buffer Empty Flag */
56 /**
57 * @}
58 */
59
60 /** @defgroup FMAC_LL_EC_IT IT Defines
61 * @brief IT defines which can be used with LL_FMAC_ReadReg and LL_FMAC_WriteReg functions
62 * @{
63 */
64 #define LL_FMAC_CR_SATIEN FMAC_CR_SATIEN /*!< Saturation Error Interrupt Enable
65 (this helps in debugging a filter) */
66 #define LL_FMAC_CR_UNFLIEN FMAC_CR_UNFLIEN /*!< Underflow Error Interrupt Enable */
67 #define LL_FMAC_CR_OVFLIEN FMAC_CR_OVFLIEN /*!< Overflow Error Interrupt Enable */
68 #define LL_FMAC_CR_WIEN FMAC_CR_WIEN /*!< Write Interrupt Enable */
69 #define LL_FMAC_CR_RIEN FMAC_CR_RIEN /*!< Read Interrupt Enable */
70 /**
71 * @}
72 */
73
74 /** @defgroup FMAC_LL_EC_WM FMAC watermarks
75 * @brief Watermark defines that can be used for buffer full (input) or buffer empty (output)
76 * @{
77 */
78 #define LL_FMAC_WM_0_THRESHOLD_1 0x00000000U /*!< Buffer full/empty flag set if there
79 is less than 1 free/unread space. */
80 #define LL_FMAC_WM_1_THRESHOLD_2 0x01000000U /*!< Buffer full/empty flag set if there
81 are less than 2 free/unread spaces. */
82 #define LL_FMAC_WM_2_THRESHOLD_4 0x02000000U /*!< Buffer full/empty flag set if there
83 are less than 4 free/unread spaces. */
84 #define LL_FMAC_WM_3_THRESHOLD_8 0x03000000U /*!< Buffer full/empty flag set if there
85 are less than 8 free/empty spaces. */
86 /**
87 * @}
88 */
89
90 /** @defgroup FMAC_LL_EC_FUNC FMAC functions
91 * @{
92 */
93 #define LL_FMAC_FUNC_LOAD_X1 (FMAC_PARAM_FUNC_0) /*!< Load X1 buffer */
94 #define LL_FMAC_FUNC_LOAD_X2 (FMAC_PARAM_FUNC_1) /*!< Load X2 buffer */
95 #define LL_FMAC_FUNC_LOAD_Y (FMAC_PARAM_FUNC_1 | FMAC_PARAM_FUNC_0) /*!< Load Y buffer */
96 #define LL_FMAC_FUNC_CONVO_FIR (FMAC_PARAM_FUNC_3) /*!< Convolution (FIR filter) */
97 #define LL_FMAC_FUNC_IIR_DIRECT_FORM_1 (FMAC_PARAM_FUNC_3 | FMAC_PARAM_FUNC_0) /*!< IIR filter (direct form 1) */
98 /**
99 * @}
100 */
101
102 /** @defgroup FMAC_LL_EC_PROCESSING FMAC processing
103 * @{
104 */
105 #define LL_FMAC_PROCESSING_STOP 0x00U /*!< Stop FMAC Processing */
106 #define LL_FMAC_PROCESSING_START 0x01U /*!< Start FMAC Processing */
107 /**
108 * @}
109 */
110
111 /**
112 * @}
113 */
114
115 /* External variables --------------------------------------------------------*/
116 /* Exported macros -----------------------------------------------------------*/
117 /** @defgroup FMAC_LL_Exported_Macros FMAC Exported Macros
118 * @{
119 */
120
121 /** @defgroup FMAC_LL_EM_WRITE_READ Common Write and read registers Macros
122 * @{
123 */
124
125 /**
126 * @brief Write a value in FMAC register
127 * @param __INSTANCE__ FMAC Instance
128 * @param __REG__ Register to be written
129 * @param __VALUE__ Value to be written in the register
130 * @retval None
131 */
132 #define LL_FMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
133
134 /**
135 * @brief Read a value in FMAC register
136 * @param __INSTANCE__ FMAC Instance
137 * @param __REG__ Register to be read
138 * @retval Register value
139 */
140 #define LL_FMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
141 /**
142 * @}
143 */
144
145 /**
146 * @}
147 */
148
149 /* Exported functions --------------------------------------------------------*/
150 /** @defgroup FMAC_LL_Exported_Functions FMAC Exported Functions
151 * @{
152 */
153
154 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
155 * @{
156 */
157
158 /**
159 * @brief Configure X1 full watermark.
160 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_SetX1FullWatermark
161 * @param FMACx FMAC instance
162 * @param Watermark This parameter can be one of the following values:
163 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
164 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
165 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
166 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
167 * @retval None
168 */
LL_FMAC_SetX1FullWatermark(FMAC_TypeDef * FMACx,uint32_t Watermark)169 __STATIC_INLINE void LL_FMAC_SetX1FullWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
170 {
171 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM, Watermark);
172 }
173
174 /**
175 * @brief Return X1 full watermark.
176 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_GetX1FullWatermark
177 * @param FMACx FMAC instance
178 * @retval uint32_t Returned value can be one of the following values:
179 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
180 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
181 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
182 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
183 */
LL_FMAC_GetX1FullWatermark(const FMAC_TypeDef * FMACx)184 __STATIC_INLINE uint32_t LL_FMAC_GetX1FullWatermark(const FMAC_TypeDef *FMACx)
185 {
186 return (uint32_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM));
187 }
188
189 /**
190 * @brief Configure X1 buffer size.
191 * @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_SetX1BufferSize
192 * @param FMACx FMAC instance
193 * @param BufferSize Number of 16-bit words allocated to the input buffer (including the optional "headroom").
194 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
195 * @retval None
196 */
LL_FMAC_SetX1BufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)197 __STATIC_INLINE void LL_FMAC_SetX1BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
198 {
199 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
200 }
201
202 /**
203 * @brief Return X1 buffer size.
204 * @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_GetX1BufferSize
205 * @param FMACx FMAC instance
206 * @retval uint8_t Number of 16-bit words allocated to the input buffer
207 * (including the optional "headroom") (value between Min_Data=0x01 and Max_Data=0xFF).
208 */
LL_FMAC_GetX1BufferSize(const FMAC_TypeDef * FMACx)209 __STATIC_INLINE uint8_t LL_FMAC_GetX1BufferSize(const FMAC_TypeDef *FMACx)
210 {
211 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE) >> FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
212 }
213
214 /**
215 * @brief Configure X1 base.
216 * @rmtoll X1BUFCFG X1_BASE LL_FMAC_SetX1Base
217 * @param FMACx FMAC instance
218 * @param Base Base address of the input buffer (X1) within the internal memory.
219 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
220 * @retval None
221 */
LL_FMAC_SetX1Base(FMAC_TypeDef * FMACx,uint8_t Base)222 __STATIC_INLINE void LL_FMAC_SetX1Base(FMAC_TypeDef *FMACx, uint8_t Base)
223 {
224 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE, ((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos);
225 }
226
227 /**
228 * @brief Return X1 base.
229 * @rmtoll X1BUFCFG X1_BASE LL_FMAC_GetX1Base
230 * @param FMACx FMAC instance
231 * @retval uint8_t Base address of the input buffer (X1) within the internal memory
232 * (value between Min_Data=0x00 and Max_Data=0xFF).
233 */
LL_FMAC_GetX1Base(const FMAC_TypeDef * FMACx)234 __STATIC_INLINE uint8_t LL_FMAC_GetX1Base(const FMAC_TypeDef *FMACx)
235 {
236 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE) >> FMAC_X1BUFCFG_X1_BASE_Pos);
237 }
238
239 /**
240 * @brief Configure X2 buffer size.
241 * @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_SetX2BufferSize
242 * @param FMACx FMAC instance
243 * @param BufferSize Number of 16-bit words allocated to the coefficient buffer.
244 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
245 * @retval None
246 */
LL_FMAC_SetX2BufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)247 __STATIC_INLINE void LL_FMAC_SetX2BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
248 {
249 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
250 }
251
252 /**
253 * @brief Return X2 buffer size.
254 * @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_GetX2BufferSize
255 * @param FMACx FMAC instance
256 * @retval uint8_t Number of 16-bit words allocated to the coefficient buffer
257 * (value between Min_Data=0x01 and Max_Data=0xFF).
258 */
LL_FMAC_GetX2BufferSize(const FMAC_TypeDef * FMACx)259 __STATIC_INLINE uint8_t LL_FMAC_GetX2BufferSize(const FMAC_TypeDef *FMACx)
260 {
261 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE) >> FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
262 }
263
264 /**
265 * @brief Configure X2 base.
266 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_SetX2Base
267 * @param FMACx FMAC instance
268 * @param Base Base address of the coefficient buffer (X2) within the internal memory.
269 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
270 * @retval None
271 */
LL_FMAC_SetX2Base(FMAC_TypeDef * FMACx,uint8_t Base)272 __STATIC_INLINE void LL_FMAC_SetX2Base(FMAC_TypeDef *FMACx, uint8_t Base)
273 {
274 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE, ((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos);
275 }
276
277 /**
278 * @brief Return X2 base.
279 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_GetX2Base
280 * @param FMACx FMAC instance
281 * @retval uint8_t Base address of the coefficient buffer (X2) within the internal memory
282 * (value between Min_Data=0x00 and Max_Data=0xFF).
283 */
LL_FMAC_GetX2Base(const FMAC_TypeDef * FMACx)284 __STATIC_INLINE uint8_t LL_FMAC_GetX2Base(const FMAC_TypeDef *FMACx)
285 {
286 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE) >> FMAC_X2BUFCFG_X2_BASE_Pos);
287 }
288
289 /**
290 * @brief Configure Y empty watermark.
291 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_SetYEmptyWatermark
292 * @param FMACx FMAC instance
293 * @param Watermark This parameter can be one of the following values:
294 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
295 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
296 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
297 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
298 * @retval None
299 */
LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef * FMACx,uint32_t Watermark)300 __STATIC_INLINE void LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
301 {
302 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM, Watermark);
303 }
304
305 /**
306 * @brief Return Y empty watermark.
307 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_GetYEmptyWatermark
308 * @param FMACx FMAC instance
309 * @retval uint32_t Returned value can be one of the following values:
310 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
311 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
312 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
313 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
314 */
LL_FMAC_GetYEmptyWatermark(const FMAC_TypeDef * FMACx)315 __STATIC_INLINE uint32_t LL_FMAC_GetYEmptyWatermark(const FMAC_TypeDef *FMACx)
316 {
317 return (uint32_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM));
318 }
319
320 /**
321 * @brief Configure Y buffer size.
322 * @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_SetYBufferSize
323 * @param FMACx FMAC instance
324 * @param BufferSize Number of 16-bit words allocated to the output buffer (including the optional "headroom").
325 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
326 * @retval None
327 */
LL_FMAC_SetYBufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)328 __STATIC_INLINE void LL_FMAC_SetYBufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
329 {
330 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
331 }
332
333 /**
334 * @brief Return Y buffer size.
335 * @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_GetYBufferSize
336 * @param FMACx FMAC instance
337 * @retval uint8_t Number of 16-bit words allocated to the output buffer
338 * (including the optional "headroom" - value between Min_Data=0x01 and Max_Data=0xFF).
339 */
LL_FMAC_GetYBufferSize(const FMAC_TypeDef * FMACx)340 __STATIC_INLINE uint8_t LL_FMAC_GetYBufferSize(const FMAC_TypeDef *FMACx)
341 {
342 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE) >> FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
343 }
344
345 /**
346 * @brief Configure Y base.
347 * @rmtoll YBUFCFG Y_BASE LL_FMAC_SetYBase
348 * @param FMACx FMAC instance
349 * @param Base Base address of the output buffer (Y) within the internal memory.
350 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
351 * @retval None
352 */
LL_FMAC_SetYBase(FMAC_TypeDef * FMACx,uint8_t Base)353 __STATIC_INLINE void LL_FMAC_SetYBase(FMAC_TypeDef *FMACx, uint8_t Base)
354 {
355 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE, ((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos);
356 }
357
358 /**
359 * @brief Return Y base.
360 * @rmtoll YBUFCFG Y_BASE LL_FMAC_GetYBase
361 * @param FMACx FMAC instance
362 * @retval uint8_t Base address of the output buffer (Y) within the internal memory
363 * (value between Min_Data=0x00 and Max_Data=0xFF).
364 */
LL_FMAC_GetYBase(const FMAC_TypeDef * FMACx)365 __STATIC_INLINE uint8_t LL_FMAC_GetYBase(const FMAC_TypeDef *FMACx)
366 {
367 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE) >> FMAC_YBUFCFG_Y_BASE_Pos);
368 }
369
370 /**
371 * @brief Start FMAC processing.
372 * @rmtoll PARAM START LL_FMAC_EnableStart
373 * @param FMACx FMAC instance
374 * @retval None
375 */
LL_FMAC_EnableStart(FMAC_TypeDef * FMACx)376 __STATIC_INLINE void LL_FMAC_EnableStart(FMAC_TypeDef *FMACx)
377 {
378 SET_BIT(FMACx->PARAM, FMAC_PARAM_START);
379 }
380
381 /**
382 * @brief Stop FMAC processing.
383 * @rmtoll PARAM START LL_FMAC_DisableStart
384 * @param FMACx FMAC instance
385 * @retval None
386 */
LL_FMAC_DisableStart(FMAC_TypeDef * FMACx)387 __STATIC_INLINE void LL_FMAC_DisableStart(FMAC_TypeDef *FMACx)
388 {
389 CLEAR_BIT(FMACx->PARAM, FMAC_PARAM_START);
390 }
391
392 /**
393 * @brief Check the state of FMAC processing.
394 * @rmtoll PARAM START LL_FMAC_IsEnabledStart
395 * @param FMACx FMAC instance
396 * @retval uint32_t State of bit (1 or 0).
397 */
LL_FMAC_IsEnabledStart(const FMAC_TypeDef * FMACx)398 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledStart(const FMAC_TypeDef *FMACx)
399 {
400 return ((READ_BIT(FMACx->PARAM, FMAC_PARAM_START) == (FMAC_PARAM_START)) ? 1UL : 0UL);
401 }
402
403 /**
404 * @brief Configure function.
405 * @rmtoll PARAM FUNC LL_FMAC_SetFunction
406 * @param FMACx FMAC instance
407 * @param Function This parameter can be one of the following values:
408 * @arg @ref LL_FMAC_FUNC_LOAD_X1
409 * @arg @ref LL_FMAC_FUNC_LOAD_X2
410 * @arg @ref LL_FMAC_FUNC_LOAD_Y
411 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
412 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
413 * @retval None
414 */
LL_FMAC_SetFunction(FMAC_TypeDef * FMACx,uint32_t Function)415 __STATIC_INLINE void LL_FMAC_SetFunction(FMAC_TypeDef *FMACx, uint32_t Function)
416 {
417 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_FUNC, Function);
418 }
419
420 /**
421 * @brief Return function.
422 * @rmtoll PARAM FUNC LL_FMAC_GetFunction
423 * @param FMACx FMAC instance
424 * @retval uint32_t Returned value can be one of the following values:
425 * @arg @ref LL_FMAC_FUNC_LOAD_X1
426 * @arg @ref LL_FMAC_FUNC_LOAD_X2
427 * @arg @ref LL_FMAC_FUNC_LOAD_Y
428 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
429 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
430 */
LL_FMAC_GetFunction(const FMAC_TypeDef * FMACx)431 __STATIC_INLINE uint32_t LL_FMAC_GetFunction(const FMAC_TypeDef *FMACx)
432 {
433 return (uint32_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_FUNC));
434 }
435
436 /**
437 * @brief Configure input parameter R.
438 * @rmtoll PARAM R LL_FMAC_SetParamR
439 * @param FMACx FMAC instance
440 * @param Param Parameter R (gain, etc.).
441 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
442 * @retval None
443 */
LL_FMAC_SetParamR(FMAC_TypeDef * FMACx,uint8_t Param)444 __STATIC_INLINE void LL_FMAC_SetParamR(FMAC_TypeDef *FMACx, uint8_t Param)
445 {
446 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_R, ((uint32_t)Param) << FMAC_PARAM_R_Pos);
447 }
448
449 /**
450 * @brief Return input parameter R.
451 * @rmtoll PARAM R LL_FMAC_GetParamR
452 * @param FMACx FMAC instance
453 * @retval uint8_t Parameter R (gain, etc.) (value between Min_Data=0x00 and Max_Data=0xFF).
454 */
LL_FMAC_GetParamR(const FMAC_TypeDef * FMACx)455 __STATIC_INLINE uint8_t LL_FMAC_GetParamR(const FMAC_TypeDef *FMACx)
456 {
457 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_R) >> FMAC_PARAM_R_Pos);
458 }
459
460 /**
461 * @brief Configure input parameter Q.
462 * @rmtoll PARAM Q LL_FMAC_SetParamQ
463 * @param FMACx FMAC instance
464 * @param Param Parameter Q (vector length, etc.).
465 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
466 * @retval None
467 */
LL_FMAC_SetParamQ(FMAC_TypeDef * FMACx,uint8_t Param)468 __STATIC_INLINE void LL_FMAC_SetParamQ(FMAC_TypeDef *FMACx, uint8_t Param)
469 {
470 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_Q, ((uint32_t)Param) << FMAC_PARAM_Q_Pos);
471 }
472
473 /**
474 * @brief Return input parameter Q.
475 * @rmtoll PARAM Q LL_FMAC_GetParamQ
476 * @param FMACx FMAC instance
477 * @retval uint8_t Parameter Q (vector length, etc.) (value between Min_Data=0x00 and Max_Data=0xFF).
478 */
LL_FMAC_GetParamQ(const FMAC_TypeDef * FMACx)479 __STATIC_INLINE uint8_t LL_FMAC_GetParamQ(const FMAC_TypeDef *FMACx)
480 {
481 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_Q) >> FMAC_PARAM_Q_Pos);
482 }
483
484 /**
485 * @brief Configure input parameter P.
486 * @rmtoll PARAM P LL_FMAC_SetParamP
487 * @param FMACx FMAC instance
488 * @param Param Parameter P (vector length, number of filter taps, etc.).
489 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
490 * @retval None
491 */
LL_FMAC_SetParamP(FMAC_TypeDef * FMACx,uint8_t Param)492 __STATIC_INLINE void LL_FMAC_SetParamP(FMAC_TypeDef *FMACx, uint8_t Param)
493 {
494 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_P, ((uint32_t)Param));
495 }
496
497 /**
498 * @brief Return input parameter P.
499 * @rmtoll PARAM P LL_FMAC_GetParamP
500 * @param FMACx FMAC instance
501 * @retval uint8_t Parameter P (vector length, number of filter taps, etc.)
502 * (value between Min_Data=0x00 and Max_Data=0xFF).
503 */
LL_FMAC_GetParamP(const FMAC_TypeDef * FMACx)504 __STATIC_INLINE uint8_t LL_FMAC_GetParamP(const FMAC_TypeDef *FMACx)
505 {
506 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_P));
507 }
508
509 /**
510 * @}
511 */
512
513 /** @defgroup FMAC_LL_EF_Reset_Management Reset_Management
514 * @{
515 */
516
517 /**
518 * @brief Start the FMAC reset.
519 * @rmtoll CR RESET LL_FMAC_EnableReset
520 * @param FMACx FMAC instance
521 * @retval None
522 */
LL_FMAC_EnableReset(FMAC_TypeDef * FMACx)523 __STATIC_INLINE void LL_FMAC_EnableReset(FMAC_TypeDef *FMACx)
524 {
525 SET_BIT(FMACx->CR, FMAC_CR_RESET);
526 }
527
528 /**
529 * @brief Check the state of the FMAC reset.
530 * @rmtoll CR RESET LL_FMAC_IsEnabledReset
531 * @param FMACx FMAC instance
532 * @retval uint32_t State of bit (1 or 0).
533 */
LL_FMAC_IsEnabledReset(const FMAC_TypeDef * FMACx)534 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledReset(const FMAC_TypeDef *FMACx)
535 {
536 return ((READ_BIT(FMACx->CR, FMAC_CR_RESET) == (FMAC_CR_RESET)) ? 1UL : 0UL);
537 }
538
539 /**
540 * @}
541 */
542
543 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
544 * @{
545 */
546
547 /**
548 * @brief Enable Clipping.
549 * @rmtoll CR CLIPEN LL_FMAC_EnableClipping
550 * @param FMACx FMAC instance
551 * @retval None
552 */
LL_FMAC_EnableClipping(FMAC_TypeDef * FMACx)553 __STATIC_INLINE void LL_FMAC_EnableClipping(FMAC_TypeDef *FMACx)
554 {
555 SET_BIT(FMACx->CR, FMAC_CR_CLIPEN);
556 }
557
558 /**
559 * @brief Disable Clipping.
560 * @rmtoll CR CLIPEN LL_FMAC_DisableClipping
561 * @param FMACx FMAC instance
562 * @retval None
563 */
LL_FMAC_DisableClipping(FMAC_TypeDef * FMACx)564 __STATIC_INLINE void LL_FMAC_DisableClipping(FMAC_TypeDef *FMACx)
565 {
566 CLEAR_BIT(FMACx->CR, FMAC_CR_CLIPEN);
567 }
568
569 /**
570 * @brief Check Clipping State.
571 * @rmtoll CR CLIPEN LL_FMAC_IsEnabledClipping
572 * @param FMACx FMAC instance
573 * @retval uint32_t State of bit (1 or 0).
574 */
LL_FMAC_IsEnabledClipping(const FMAC_TypeDef * FMACx)575 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledClipping(const FMAC_TypeDef *FMACx)
576 {
577 return ((READ_BIT(FMACx->CR, FMAC_CR_CLIPEN) == (FMAC_CR_CLIPEN)) ? 1UL : 0UL);
578 }
579
580 /**
581 * @}
582 */
583
584 /** @defgroup FMAC_LL_EF_DMA_Management DMA_Management
585 * @{
586 */
587
588 /**
589 * @brief Enable FMAC DMA write channel request.
590 * @rmtoll CR DMAWEN LL_FMAC_EnableDMAReq_WRITE
591 * @param FMACx FMAC instance
592 * @retval None
593 */
LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef * FMACx)594 __STATIC_INLINE void LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef *FMACx)
595 {
596 SET_BIT(FMACx->CR, FMAC_CR_DMAWEN);
597 }
598
599 /**
600 * @brief Disable FMAC DMA write channel request.
601 * @rmtoll CR DMAWEN LL_FMAC_DisableDMAReq_WRITE
602 * @param FMACx FMAC instance
603 * @retval None
604 */
LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef * FMACx)605 __STATIC_INLINE void LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef *FMACx)
606 {
607 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAWEN);
608 }
609
610 /**
611 * @brief Check FMAC DMA write channel request state.
612 * @rmtoll CR DMAWEN LL_FMAC_IsEnabledDMAReq_WRITE
613 * @param FMACx FMAC instance
614 * @retval uint32_t State of bit (1 or 0).
615 */
LL_FMAC_IsEnabledDMAReq_WRITE(const FMAC_TypeDef * FMACx)616 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_WRITE(const FMAC_TypeDef *FMACx)
617 {
618 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAWEN) == (FMAC_CR_DMAWEN)) ? 1UL : 0UL);
619 }
620
621 /**
622 * @brief Enable FMAC DMA read channel request.
623 * @rmtoll CR DMAREN LL_FMAC_EnableDMAReq_READ
624 * @param FMACx FMAC instance
625 * @retval None
626 */
LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef * FMACx)627 __STATIC_INLINE void LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef *FMACx)
628 {
629 SET_BIT(FMACx->CR, FMAC_CR_DMAREN);
630 }
631
632 /**
633 * @brief Disable FMAC DMA read channel request.
634 * @rmtoll CR DMAREN LL_FMAC_DisableDMAReq_READ
635 * @param FMACx FMAC instance
636 * @retval None
637 */
LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef * FMACx)638 __STATIC_INLINE void LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef *FMACx)
639 {
640 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN);
641 }
642
643 /**
644 * @brief Check FMAC DMA read channel request state.
645 * @rmtoll CR DMAREN LL_FMAC_IsEnabledDMAReq_READ
646 * @param FMACx FMAC instance
647 * @retval uint32_t State of bit (1 or 0).
648 */
LL_FMAC_IsEnabledDMAReq_READ(const FMAC_TypeDef * FMACx)649 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_READ(const FMAC_TypeDef *FMACx)
650 {
651 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL);
652 }
653
654 /**
655 * @}
656 */
657
658 /** @defgroup FMAC_LL_EF_IT_Management IT_Management
659 * @{
660 */
661
662 /**
663 * @brief Enable FMAC saturation error interrupt.
664 * @rmtoll CR SATIEN LL_FMAC_EnableIT_SAT
665 * @param FMACx FMAC instance
666 * @retval None
667 */
LL_FMAC_EnableIT_SAT(FMAC_TypeDef * FMACx)668 __STATIC_INLINE void LL_FMAC_EnableIT_SAT(FMAC_TypeDef *FMACx)
669 {
670 SET_BIT(FMACx->CR, FMAC_CR_SATIEN);
671 }
672
673 /**
674 * @brief Disable FMAC saturation error interrupt.
675 * @rmtoll CR SATIEN LL_FMAC_DisableIT_SAT
676 * @param FMACx FMAC instance
677 * @retval None
678 */
LL_FMAC_DisableIT_SAT(FMAC_TypeDef * FMACx)679 __STATIC_INLINE void LL_FMAC_DisableIT_SAT(FMAC_TypeDef *FMACx)
680 {
681 CLEAR_BIT(FMACx->CR, FMAC_CR_SATIEN);
682 }
683
684 /**
685 * @brief Check FMAC saturation error interrupt state.
686 * @rmtoll CR SATIEN LL_FMAC_IsEnabledIT_SAT
687 * @param FMACx FMAC instance
688 * @retval uint32_t State of bit (1 or 0).
689 */
LL_FMAC_IsEnabledIT_SAT(const FMAC_TypeDef * FMACx)690 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_SAT(const FMAC_TypeDef *FMACx)
691 {
692 return ((READ_BIT(FMACx->CR, FMAC_CR_SATIEN) == (FMAC_CR_SATIEN)) ? 1UL : 0UL);
693 }
694
695 /**
696 * @brief Enable FMAC underflow error interrupt.
697 * @rmtoll CR UNFLIEN LL_FMAC_EnableIT_UNFL
698 * @param FMACx FMAC instance
699 * @retval None
700 */
LL_FMAC_EnableIT_UNFL(FMAC_TypeDef * FMACx)701 __STATIC_INLINE void LL_FMAC_EnableIT_UNFL(FMAC_TypeDef *FMACx)
702 {
703 SET_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
704 }
705
706 /**
707 * @brief Disable FMAC underflow error interrupt.
708 * @rmtoll CR UNFLIEN LL_FMAC_DisableIT_UNFL
709 * @param FMACx FMAC instance
710 * @retval None
711 */
LL_FMAC_DisableIT_UNFL(FMAC_TypeDef * FMACx)712 __STATIC_INLINE void LL_FMAC_DisableIT_UNFL(FMAC_TypeDef *FMACx)
713 {
714 CLEAR_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
715 }
716
717 /**
718 * @brief Check FMAC underflow error interrupt state.
719 * @rmtoll CR UNFLIEN LL_FMAC_IsEnabledIT_UNFL
720 * @param FMACx FMAC instance
721 * @retval uint32_t State of bit (1 or 0).
722 */
LL_FMAC_IsEnabledIT_UNFL(const FMAC_TypeDef * FMACx)723 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_UNFL(const FMAC_TypeDef *FMACx)
724 {
725 return ((READ_BIT(FMACx->CR, FMAC_CR_UNFLIEN) == (FMAC_CR_UNFLIEN)) ? 1UL : 0UL);
726 }
727
728 /**
729 * @brief Enable FMAC overflow error interrupt.
730 * @rmtoll CR OVFLIEN LL_FMAC_EnableIT_OVFL
731 * @param FMACx FMAC instance
732 * @retval None
733 */
LL_FMAC_EnableIT_OVFL(FMAC_TypeDef * FMACx)734 __STATIC_INLINE void LL_FMAC_EnableIT_OVFL(FMAC_TypeDef *FMACx)
735 {
736 SET_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
737 }
738
739 /**
740 * @brief Disable FMAC overflow error interrupt.
741 * @rmtoll CR OVFLIEN LL_FMAC_DisableIT_OVFL
742 * @param FMACx FMAC instance
743 * @retval None
744 */
LL_FMAC_DisableIT_OVFL(FMAC_TypeDef * FMACx)745 __STATIC_INLINE void LL_FMAC_DisableIT_OVFL(FMAC_TypeDef *FMACx)
746 {
747 CLEAR_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
748 }
749
750 /**
751 * @brief Check FMAC overflow error interrupt state.
752 * @rmtoll CR OVFLIEN LL_FMAC_IsEnabledIT_OVFL
753 * @param FMACx FMAC instance
754 * @retval uint32_t State of bit (1 or 0).
755 */
LL_FMAC_IsEnabledIT_OVFL(const FMAC_TypeDef * FMACx)756 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_OVFL(const FMAC_TypeDef *FMACx)
757 {
758 return ((READ_BIT(FMACx->CR, FMAC_CR_OVFLIEN) == (FMAC_CR_OVFLIEN)) ? 1UL : 0UL);
759 }
760
761 /**
762 * @brief Enable FMAC write interrupt.
763 * @rmtoll CR WIEN LL_FMAC_EnableIT_WR
764 * @param FMACx FMAC instance
765 * @retval None
766 */
LL_FMAC_EnableIT_WR(FMAC_TypeDef * FMACx)767 __STATIC_INLINE void LL_FMAC_EnableIT_WR(FMAC_TypeDef *FMACx)
768 {
769 SET_BIT(FMACx->CR, FMAC_CR_WIEN);
770 }
771
772 /**
773 * @brief Disable FMAC write interrupt.
774 * @rmtoll CR WIEN LL_FMAC_DisableIT_WR
775 * @param FMACx FMAC instance
776 * @retval None
777 */
LL_FMAC_DisableIT_WR(FMAC_TypeDef * FMACx)778 __STATIC_INLINE void LL_FMAC_DisableIT_WR(FMAC_TypeDef *FMACx)
779 {
780 CLEAR_BIT(FMACx->CR, FMAC_CR_WIEN);
781 }
782
783 /**
784 * @brief Check FMAC write interrupt state.
785 * @rmtoll CR WIEN LL_FMAC_IsEnabledIT_WR
786 * @param FMACx FMAC instance
787 * @retval uint32_t State of bit (1 or 0).
788 */
LL_FMAC_IsEnabledIT_WR(const FMAC_TypeDef * FMACx)789 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_WR(const FMAC_TypeDef *FMACx)
790 {
791 return ((READ_BIT(FMACx->CR, FMAC_CR_WIEN) == (FMAC_CR_WIEN)) ? 1UL : 0UL);
792 }
793
794 /**
795 * @brief Enable FMAC read interrupt.
796 * @rmtoll CR RIEN LL_FMAC_EnableIT_RD
797 * @param FMACx FMAC instance
798 * @retval None
799 */
LL_FMAC_EnableIT_RD(FMAC_TypeDef * FMACx)800 __STATIC_INLINE void LL_FMAC_EnableIT_RD(FMAC_TypeDef *FMACx)
801 {
802 SET_BIT(FMACx->CR, FMAC_CR_RIEN);
803 }
804
805 /**
806 * @brief Disable FMAC read interrupt.
807 * @rmtoll CR RIEN LL_FMAC_DisableIT_RD
808 * @param FMACx FMAC instance
809 * @retval None
810 */
LL_FMAC_DisableIT_RD(FMAC_TypeDef * FMACx)811 __STATIC_INLINE void LL_FMAC_DisableIT_RD(FMAC_TypeDef *FMACx)
812 {
813 CLEAR_BIT(FMACx->CR, FMAC_CR_RIEN);
814 }
815
816 /**
817 * @brief Check FMAC read interrupt state.
818 * @rmtoll CR RIEN LL_FMAC_IsEnabledIT_RD
819 * @param FMACx FMAC instance
820 * @retval uint32_t State of bit (1 or 0).
821 */
LL_FMAC_IsEnabledIT_RD(const FMAC_TypeDef * FMACx)822 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_RD(const FMAC_TypeDef *FMACx)
823 {
824 return ((READ_BIT(FMACx->CR, FMAC_CR_RIEN) == (FMAC_CR_RIEN)) ? 1UL : 0UL);
825 }
826
827 /**
828 * @}
829 */
830
831 /** @defgroup FMAC_LL_EF_FLAG_Management FLAG_Management
832 * @{
833 */
834
835 /**
836 * @brief Check FMAC saturation error flag state.
837 * @rmtoll SR SAT LL_FMAC_IsActiveFlag_SAT
838 * @param FMACx FMAC instance
839 * @retval uint32_t State of bit (1 or 0).
840 */
LL_FMAC_IsActiveFlag_SAT(const FMAC_TypeDef * FMACx)841 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_SAT(const FMAC_TypeDef *FMACx)
842 {
843 return ((READ_BIT(FMACx->SR, FMAC_SR_SAT) == (FMAC_SR_SAT)) ? 1UL : 0UL);
844 }
845
846 /**
847 * @brief Check FMAC underflow error flag state.
848 * @rmtoll SR UNFL LL_FMAC_IsActiveFlag_UNFL
849 * @param FMACx FMAC instance
850 * @retval uint32_t State of bit (1 or 0).
851 */
LL_FMAC_IsActiveFlag_UNFL(const FMAC_TypeDef * FMACx)852 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_UNFL(const FMAC_TypeDef *FMACx)
853 {
854 return ((READ_BIT(FMACx->SR, FMAC_SR_UNFL) == (FMAC_SR_UNFL)) ? 1UL : 0UL);
855 }
856
857 /**
858 * @brief Check FMAC overflow error flag state.
859 * @rmtoll SR OVFL LL_FMAC_IsActiveFlag_OVFL
860 * @param FMACx FMAC instance
861 * @retval uint32_t State of bit (1 or 0).
862 */
LL_FMAC_IsActiveFlag_OVFL(const FMAC_TypeDef * FMACx)863 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_OVFL(const FMAC_TypeDef *FMACx)
864 {
865 return ((READ_BIT(FMACx->SR, FMAC_SR_OVFL) == (FMAC_SR_OVFL)) ? 1UL : 0UL);
866 }
867
868 /**
869 * @brief Check FMAC X1 buffer full flag state.
870 * @rmtoll SR X1FULL LL_FMAC_IsActiveFlag_X1FULL
871 * @param FMACx FMAC instance
872 * @retval uint32_t State of bit (1 or 0).
873 */
LL_FMAC_IsActiveFlag_X1FULL(const FMAC_TypeDef * FMACx)874 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_X1FULL(const FMAC_TypeDef *FMACx)
875 {
876 return ((READ_BIT(FMACx->SR, FMAC_SR_X1FULL) == (FMAC_SR_X1FULL)) ? 1UL : 0UL);
877 }
878
879 /**
880 * @brief Check FMAC Y buffer empty flag state.
881 * @rmtoll SR YEMPTY LL_FMAC_IsActiveFlag_YEMPTY
882 * @param FMACx FMAC instance
883 * @retval uint32_t State of bit (1 or 0).
884 */
LL_FMAC_IsActiveFlag_YEMPTY(const FMAC_TypeDef * FMACx)885 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_YEMPTY(const FMAC_TypeDef *FMACx)
886 {
887 return ((READ_BIT(FMACx->SR, FMAC_SR_YEMPTY) == (FMAC_SR_YEMPTY)) ? 1UL : 0UL);
888 }
889
890 /**
891 * @}
892 */
893
894 /** @defgroup FMAC_LL_EF_Data_Management Data_Management
895 * @{
896 */
897
898 /**
899 * @brief Write 16-bit input data for the FMAC processing.
900 * @rmtoll WDATA WDATA LL_FMAC_WriteData
901 * @param FMACx FMAC instance
902 * @param InData 16-bit value to be provided as input data for FMAC processing.
903 * This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
904 * @retval None
905 */
LL_FMAC_WriteData(FMAC_TypeDef * FMACx,uint16_t InData)906 __STATIC_INLINE void LL_FMAC_WriteData(FMAC_TypeDef *FMACx, uint16_t InData)
907 {
908 WRITE_REG(FMACx->WDATA, InData);
909 }
910
911 /**
912 * @brief Return 16-bit output data of FMAC processing.
913 * @rmtoll RDATA RDATA LL_FMAC_ReadData
914 * @param FMACx FMAC instance
915 * @retval uint16_t 16-bit output data of FMAC processing (value between Min_Data=0x0000 and Max_Data=0xFFFF).
916 */
LL_FMAC_ReadData(const FMAC_TypeDef * FMACx)917 __STATIC_INLINE uint16_t LL_FMAC_ReadData(const FMAC_TypeDef *FMACx)
918 {
919 return (uint16_t)(READ_REG(FMACx->RDATA));
920 }
921
922 /**
923 * @}
924 */
925
926 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
927 * @{
928 */
929
930 /**
931 * @brief Configure memory for X1 buffer.
932 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_ConfigX1\n
933 * X1BUFCFG X1_BASE LL_FMAC_ConfigX1\n
934 * X1BUFCFG X1_BUF_SIZE LL_FMAC_ConfigX1
935 * @param FMACx FMAC instance
936 * @param Watermark This parameter can be one of the following values:
937 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
938 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
939 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
940 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
941 * @param Base Base address of the input buffer (X1) within the internal memory.
942 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
943 * @param BufferSize Number of 16-bit words allocated to the input buffer (including the optional "headroom").
944 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
945 * @retval None
946 */
LL_FMAC_ConfigX1(FMAC_TypeDef * FMACx,uint32_t Watermark,uint8_t Base,uint8_t BufferSize)947 __STATIC_INLINE void LL_FMAC_ConfigX1(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
948 {
949 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM | FMAC_X1BUFCFG_X1_BASE | FMAC_X1BUFCFG_X1_BUF_SIZE,
950 Watermark | (((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos) |
951 (((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos));
952 }
953
954 /**
955 * @brief Configure memory for X2 buffer.
956 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_ConfigX2\n
957 * X2BUFCFG X2_BUF_SIZE LL_FMAC_ConfigX2
958 * @param FMACx FMAC instance
959 * @param Base Base address of the coefficient buffer (X2) within the internal memory.
960 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
961 * @param BufferSize Number of 16-bit words allocated to the coefficient buffer.
962 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
963 * @retval None
964 */
LL_FMAC_ConfigX2(FMAC_TypeDef * FMACx,uint8_t Base,uint8_t BufferSize)965 __STATIC_INLINE void LL_FMAC_ConfigX2(FMAC_TypeDef *FMACx, uint8_t Base, uint8_t BufferSize)
966 {
967 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE | FMAC_X2BUFCFG_X2_BUF_SIZE,
968 (((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos) |
969 (((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos));
970 }
971
972 /**
973 * @brief Configure memory for Y buffer.
974 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_ConfigY\n
975 * YBUFCFG Y_BASE LL_FMAC_ConfigY\n
976 * YBUFCFG Y_BUF_SIZE LL_FMAC_ConfigY
977 * @param FMACx FMAC instance
978 * @param Watermark This parameter can be one of the following values:
979 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
980 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
981 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
982 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
983 * @param Base Base address of the output buffer (Y) within the internal memory.
984 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
985 * @param BufferSize Number of 16-bit words allocated to the output buffer (including the optional "headroom").
986 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
987 * @retval None
988 */
LL_FMAC_ConfigY(FMAC_TypeDef * FMACx,uint32_t Watermark,uint8_t Base,uint8_t BufferSize)989 __STATIC_INLINE void LL_FMAC_ConfigY(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
990 {
991 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM | FMAC_YBUFCFG_Y_BASE | FMAC_YBUFCFG_Y_BUF_SIZE,
992 Watermark | (((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos) |
993 (((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos));
994 }
995
996 /**
997 * @brief Configure the FMAC processing.
998 * @rmtoll PARAM START LL_FMAC_ConfigFunc\n
999 * PARAM FUNC LL_FMAC_ConfigFunc\n
1000 * PARAM P LL_FMAC_ConfigFunc\n
1001 * PARAM Q LL_FMAC_ConfigFunc\n
1002 * PARAM R LL_FMAC_ConfigFunc
1003 * @param FMACx FMAC instance
1004 * @param Start This parameter can be one of the following values:
1005 * @arg @ref LL_FMAC_PROCESSING_STOP
1006 * @arg @ref LL_FMAC_PROCESSING_START
1007 * @param Function This parameter can be one of the following values:
1008 * @arg @ref LL_FMAC_FUNC_LOAD_X1
1009 * @arg @ref LL_FMAC_FUNC_LOAD_X2
1010 * @arg @ref LL_FMAC_FUNC_LOAD_Y
1011 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
1012 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
1013 * @param ParamP Parameter P (vector length, number of filter taps, etc.).
1014 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1015 * @param ParamQ Parameter Q (vector length, etc.).
1016 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1017 * @param ParamR Parameter R (gain, etc.).
1018 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1019 * @retval None
1020 */
LL_FMAC_ConfigFunc(FMAC_TypeDef * FMACx,uint8_t Start,uint32_t Function,uint8_t ParamP,uint8_t ParamQ,uint8_t ParamR)1021 __STATIC_INLINE void LL_FMAC_ConfigFunc(FMAC_TypeDef *FMACx, uint8_t Start, uint32_t Function, uint8_t ParamP,
1022 uint8_t ParamQ, uint8_t ParamR)
1023 {
1024 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_START | FMAC_PARAM_FUNC | FMAC_PARAM_P | FMAC_PARAM_Q | FMAC_PARAM_R,
1025 (((uint32_t)Start) << FMAC_PARAM_START_Pos) | Function | (((uint32_t)ParamP) << FMAC_PARAM_P_Pos) |
1026 (((uint32_t)ParamQ) << FMAC_PARAM_Q_Pos) | (((uint32_t)ParamR) << FMAC_PARAM_R_Pos));
1027 }
1028
1029 /**
1030 * @}
1031 */
1032
1033 #if defined(USE_FULL_LL_DRIVER)
1034 /** @defgroup FMAC_LL_EF_Init Initialization and de-initialization functions
1035 * @{
1036 */
1037 ErrorStatus LL_FMAC_Init(FMAC_TypeDef *FMACx);
1038 ErrorStatus LL_FMAC_DeInit(const FMAC_TypeDef *FMACx);
1039
1040 /**
1041 * @}
1042 */
1043 #endif /* USE_FULL_LL_DRIVER */
1044
1045 /**
1046 * @}
1047 */
1048
1049 /**
1050 * @}
1051 */
1052
1053 #endif /* defined(FMAC) */
1054
1055 /**
1056 * @}
1057 */
1058
1059 #ifdef __cplusplus
1060 }
1061 #endif
1062
1063 #endif /* STM32H5xx_LL_FMAC_H */
1064
