Home
last modified time | relevance | path

Searched refs:DeadTime (Results 1 – 25 of 119) sorted by relevance

12345

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_lcd.c161 assert_param(IS_LCD_DEAD_TIME(hlcd->Init.DeadTime)); in HAL_LCD_Init()
202 … hlcd->Init.DeadTime | hlcd->Init.PulseOnDuration | hlcd->Init.Contrast | hlcd->Init.HighDrive)); in HAL_LCD_Init()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_lcd.c161 assert_param(IS_LCD_DEAD_TIME(hlcd->Init.DeadTime)); in HAL_LCD_Init()
202 … hlcd->Init.DeadTime | hlcd->Init.PulseOnDuration | hlcd->Init.Contrast | hlcd->Init.HighDrive)); in HAL_LCD_Init()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_lcd.c188 assert_param(IS_LCD_DEAD_TIME(hlcd->Init.DeadTime)); in HAL_LCD_Init()
231 … hlcd->Init.DeadTime | hlcd->Init.PulseOnDuration | hlcd->Init.Contrast | hlcd->Init.HighDrive)); in HAL_LCD_Init()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_lcd.c159 assert_param(IS_LCD_DEAD_TIME(hlcd->Init.DeadTime)); in HAL_LCD_Init()
200 … hlcd->Init.DeadTime | hlcd->Init.PulseOnDuration | hlcd->Init.Contrast | hlcd->Init.HighDrive)); in HAL_LCD_Init()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_lcd.c196 assert_param(IS_LCD_DEAD_TIME(hlcd->Init.DeadTime)); in HAL_LCD_Init()
238 … hlcd->Init.DeadTime | hlcd->Init.PulseOnDuration | hlcd->Init.Contrast | hlcd->Init.HighDrive)); in HAL_LCD_Init()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_tim.h485 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
2923 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2925 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
4527 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_SetFallingDeadTime() argument
4529 MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime); in LL_TIM_SetFallingDeadTime()
Dstm32n6xx_ll_dma2d.h988 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) in LL_DMA2D_SetDeadTime() argument
990 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); in LL_DMA2D_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_tim.h468 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
2839 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2841 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
4389 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_SetFallingDeadTime() argument
4391 MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime); in LL_TIM_SetFallingDeadTime()
Dstm32h7rsxx_ll_dma2d.h988 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) in LL_DMA2D_SetDeadTime() argument
990 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); in LL_DMA2D_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_tim.h470 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
2826 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2828 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
4328 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_SetFallingDeadTime() argument
4330 MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime); in LL_TIM_SetFallingDeadTime()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_tim.h483 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
3135 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
3137 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
4713 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_SetFallingDeadTime() argument
4715 MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime); in LL_TIM_SetFallingDeadTime()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_tim.h481 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
3066 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
3068 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
4664 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_SetFallingDeadTime() argument
4666 MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime); in LL_TIM_SetFallingDeadTime()
Dstm32u5xx_ll_dma2d.h994 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) in LL_DMA2D_SetDeadTime() argument
996 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); in LL_DMA2D_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_tim.h470 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
3199 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
3201 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
4840 __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_SetFallingDeadTime() argument
4842 MODIFY_REG(TIMx->DTR2, TIM_DTR2_DTGF, DeadTime); in LL_TIM_SetFallingDeadTime()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma2d.h793 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) in LL_DMA2D_SetDeadTime() argument
795 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); in LL_DMA2D_SetDeadTime()
Dstm32f4xx_ll_tim.h440 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
2103 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2105 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_tim.c670 TIM_BDTRInitStruct->DeadTime = (uint8_t)0x00; in LL_TIM_BDTR_StructInit()
707 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma2d.h988 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) in LL_DMA2D_SetDeadTime() argument
990 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); in LL_DMA2D_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_tim.c670 TIM_BDTRInitStruct->DeadTime = (uint8_t)0x00; in LL_TIM_BDTR_StructInit()
707 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_tim.c649 TIM_BDTRInitStruct->DeadTime = (uint8_t)0x00; in LL_TIM_BDTR_StructInit()
686 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); in LL_TIM_BDTR_Init()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma2d.h897 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) in LL_DMA2D_SetDeadTime() argument
899 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); in LL_DMA2D_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma2d.h1001 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) in LL_DMA2D_SetDeadTime() argument
1003 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); in LL_DMA2D_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_tim.h437 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
2060 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2062 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_tim.h440 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
2081 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2083 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_tim.h434 uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the member
2033 __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) in LL_TIM_OC_SetDeadTime() argument
2035 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()

12345