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Searched refs:DMAMUX1_BASE (Results 1 – 25 of 106) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h832 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x00000800UL) macro
851 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
852 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
853 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
854 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
855 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
856 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
857 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
858 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
859 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
Dstm32wle5xx.h832 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x00000800UL) macro
851 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
852 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
853 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
854 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
855 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
856 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
857 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
858 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
859 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
Dstm32wl5mxx.h996 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x00000800UL) macro
1015 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
1016 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
1017 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
1018 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
1019 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
1020 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
1021 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
1022 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
1023 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
Dstm32wl54xx.h996 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x00000800UL) macro
1015 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
1016 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
1017 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
1018 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
1019 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
1020 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
1021 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
1022 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
1023 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
Dstm32wl55xx.h996 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x00000800UL) macro
1015 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
1016 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
1017 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
1018 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
1019 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
1020 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
1021 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
1022 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
1023 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xc.h906 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x0800UL) macro
931 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
932 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
933 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
934 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
935 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
936 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
937 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL)
938 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL)
939 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL)
[all …]
Dstm32g411xb.h890 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x0800UL) macro
911 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
912 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
913 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
914 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
915 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
916 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
917 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0020UL)
918 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0024UL)
919 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0028UL)
[all …]
Dstm32g4a1xx.h1089 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x0800UL) macro
1114 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
1115 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
1116 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
1117 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
1118 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
1119 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
1120 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL)
1121 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL)
1122 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL)
[all …]
Dstm32g491xx.h1057 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x0800UL) macro
1082 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
1083 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
1084 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
1085 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
1086 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
1087 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
1088 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL)
1089 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL)
1090 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL)
[all …]
Dstm32g473xx.h1122 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x0800UL) macro
1147 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
1148 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
1149 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
1150 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
1151 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
1152 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
1153 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL)
1154 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL)
1155 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL)
[all …]
Dstm32g471xx.h1067 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x0800UL) macro
1092 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
1093 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
1094 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
1095 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
1096 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
1097 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
1098 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL)
1099 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL)
1100 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL)
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h624 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
644 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
645 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
646 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
647 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
648 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
649 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
650 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
651 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
652 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
Dstm32g050xx.h571 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
586 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
587 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
588 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
589 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
590 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
591 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
592 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
594 #define DMAMUX1_RequestGenerator0_BASE (DMAMUX1_BASE + 0x00000100UL)
595 #define DMAMUX1_RequestGenerator1_BASE (DMAMUX1_BASE + 0x00000104UL)
[all …]
Dstm32g070xx.h572 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
587 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
588 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
589 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
590 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
591 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
592 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
593 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
595 #define DMAMUX1_RequestGenerator0_BASE (DMAMUX1_BASE + 0x00000100UL)
596 #define DMAMUX1_RequestGenerator1_BASE (DMAMUX1_BASE + 0x00000104UL)
[all …]
Dstm32g0c1xx.h864 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
886 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
887 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
888 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
889 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
890 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
891 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
892 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
893 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
894 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
Dstm32g0b1xx.h822 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
842 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
843 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
844 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
845 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
846 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
847 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
848 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
849 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
850 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
Dstm32g051xx.h648 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
663 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
664 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
665 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
666 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
667 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
668 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
669 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
671 #define DMAMUX1_RequestGenerator0_BASE (DMAMUX1_BASE + 0x00000100UL)
672 #define DMAMUX1_RequestGenerator1_BASE (DMAMUX1_BASE + 0x00000104UL)
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u083xx.h912 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x0800UL) macro
914 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
915 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
916 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
917 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
918 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
919 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
920 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL)
921 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL)
922 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL)
[all …]
Dstm32u073xx.h878 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x0800UL) macro
880 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
881 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x0004UL)
882 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x0008UL)
883 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x000CUL)
884 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x0010UL)
885 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x0014UL)
886 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x0018UL)
887 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x001CUL)
888 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x0020UL)
[all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_dmamux.h53 #define DMAMUX_REQ_GEN_OFFSET (DMAMUX1_RequestGenerator0_BASE - DMAMUX1_BASE)
55 #define DMAMUX_CH_STATUS_OFFSET (DMAMUX1_ChannelStatus_BASE - DMAMUX1_BASE)
57 #define DMAMUX_REQ_GEN_STATUS_OFFSET (DMAMUX1_RequestGenStatus_BASE - DMAMUX1_BASE)
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h602 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
616 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
617 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
618 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
619 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
620 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
622 #define DMAMUX1_RequestGenerator0_BASE (DMAMUX1_BASE + 0x00000100UL)
623 #define DMAMUX1_RequestGenerator1_BASE (DMAMUX1_BASE + 0x00000104UL)
624 #define DMAMUX1_RequestGenerator2_BASE (DMAMUX1_BASE + 0x00000108UL)
625 #define DMAMUX1_RequestGenerator3_BASE (DMAMUX1_BASE + 0x0000010CUL)
[all …]
Dstm32c011xx.h537 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
549 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
550 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
551 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
553 #define DMAMUX1_RequestGenerator0_BASE (DMAMUX1_BASE + 0x00000100UL)
554 #define DMAMUX1_RequestGenerator1_BASE (DMAMUX1_BASE + 0x00000104UL)
555 #define DMAMUX1_RequestGenerator2_BASE (DMAMUX1_BASE + 0x00000108UL)
556 #define DMAMUX1_RequestGenerator3_BASE (DMAMUX1_BASE + 0x0000010CUL)
558 #define DMAMUX1_ChannelStatus_BASE (DMAMUX1_BASE + 0x00000080UL)
559 #define DMAMUX1_RequestGenStatus_BASE (DMAMUX1_BASE + 0x00000140UL)
[all …]
Dstm32c031xx.h539 #define DMAMUX1_BASE (AHBPERIPH_BASE + 0x00000800UL) macro
551 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
552 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
553 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
555 #define DMAMUX1_RequestGenerator0_BASE (DMAMUX1_BASE + 0x00000100UL)
556 #define DMAMUX1_RequestGenerator1_BASE (DMAMUX1_BASE + 0x00000104UL)
557 #define DMAMUX1_RequestGenerator2_BASE (DMAMUX1_BASE + 0x00000108UL)
558 #define DMAMUX1_RequestGenerator3_BASE (DMAMUX1_BASE + 0x0000010CUL)
560 #define DMAMUX1_ChannelStatus_BASE (DMAMUX1_BASE + 0x00000080UL)
561 #define DMAMUX1_RequestGenStatus_BASE (DMAMUX1_BASE + 0x00000140UL)
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h952 #define DMAMUX1_BASE (AHB1PERIPH_BASE + 0x00000800UL) macro
971 #define DMAMUX1_Channel0_BASE (DMAMUX1_BASE)
972 #define DMAMUX1_Channel1_BASE (DMAMUX1_BASE + 0x00000004UL)
973 #define DMAMUX1_Channel2_BASE (DMAMUX1_BASE + 0x00000008UL)
974 #define DMAMUX1_Channel3_BASE (DMAMUX1_BASE + 0x0000000CUL)
975 #define DMAMUX1_Channel4_BASE (DMAMUX1_BASE + 0x00000010UL)
976 #define DMAMUX1_Channel5_BASE (DMAMUX1_BASE + 0x00000014UL)
977 #define DMAMUX1_Channel6_BASE (DMAMUX1_BASE + 0x00000018UL)
978 #define DMAMUX1_Channel7_BASE (DMAMUX1_BASE + 0x0000001CUL)
979 #define DMAMUX1_Channel8_BASE (DMAMUX1_BASE + 0x00000020UL)
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dmamux.h53 #define DMAMUX_REQ_GEN_OFFSET (DMAMUX1_RequestGenerator0_BASE - DMAMUX1_BASE)
55 #define DMAMUX_CH_STATUS_OFFSET (DMAMUX1_ChannelStatus_BASE - DMAMUX1_BASE)
57 #define DMAMUX_REQ_GEN_STATUS_OFFSET (DMAMUX1_RequestGenStatus_BASE - DMAMUX1_BASE)

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