/hal_stm32-latest/stm32cube/stm32g4xx/soc/ |
D | stm32g411xb.h | 2733 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 2734 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g411xc.h | 2770 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 2771 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g441xx.h | 3078 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3079 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32gbk1cb.h | 2843 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 2844 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g431xx.h | 2857 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 2858 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g4a1xx.h | 3158 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3159 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g491xx.h | 2937 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 2938 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g473xx.h | 3029 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3030 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g471xx.h | 2948 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 2949 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g483xx.h | 3250 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3251 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g414xx.h | 3132 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3133 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g474xx.h | 3159 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3160 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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D | stm32g484xx.h | 3380 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3381 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)/*!< 0x0…
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/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 3473 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 3474 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos)
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/hal_stm32-latest/stm32cube/stm32l4xx/soc/ |
D | stm32l433xx.h | 14838 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 14839 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l442xx.h | 13981 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 13982 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l431xx.h | 14609 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 14610 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l432xx.h | 13756 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 13757 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l443xx.h | 15063 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 15064 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l471xx.h | 16183 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 16184 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l475xx.h | 16347 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 16348 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l476xx.h | 16504 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 16505 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l486xx.h | 16723 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 16724 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l485xx.h | 16572 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 16573 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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D | stm32l4a6xx.h | 18070 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos (5U) macro 18071 #define DBGMCU_APB1FZR1_DBG_TIM7_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM7_STOP_Pos) /*!< 0x…
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