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Searched refs:CFGR1 (Results 1 – 25 of 326) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal.h568 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE))
574 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
575 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE_0; \
582 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
583 … SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1); \
588 #define __HAL_SYSCFG_FMC_BANK() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
589 SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_2); \
602 #define __HAL_REMAPENCODER_NONE() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE))
608 #define __HAL_REMAPENCODER_TIM2() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE); \
609 SYSCFG->CFGR1 |= SYSCFG_CFGR1_ENCODER_MODE_0; \
[all …]
Dstm32f3xx_ll_system.h507 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
523 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
608 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF0000U) >> 8U, (Remap & 0x0000FF00U)); in LL_SYSCFG_SetRemapDMA_DAC()
630 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF0000U) >> 8U, (Remap & 0x0000FF00U)); in LL_SYSCFG_SetRemapDMA_TIM()
651 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0xFF00FF00U) >> 8U, (Remap & 0x00FF00FFU)); in LL_SYSCFG_SetRemapInput_TIM()
742 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_USB_IT_RMP); in LL_SYSCFG_EnableRemapIT_USB()
752 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_USB_IT_RMP); in LL_SYSCFG_DisableRemapIT_USB()
764 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_VBAT); in LL_SYSCFG_EnableVBATMonitoring()
774 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_VBAT); in LL_SYSCFG_DisableVBATMonitoring()
801 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_comp.h300 MODIFY_REG(COMPx->CFGR1, COMP_CFGR1_PWRMODE, PowerMode); in LL_COMP_SetPowerMode()
314 return (uint32_t)(READ_BIT(COMPx->CFGR1, COMP_CFGR1_PWRMODE)); in LL_COMP_GetPowerMode()
370 MODIFY_REG(COMPx->CFGR1, in LL_COMP_ConfigInputs()
392 MODIFY_REG(COMPx->CFGR1, COMP_CFGR1_INPSEL1 | COMP_CFGR1_INPSEL2, InputPlus); in LL_COMP_SetInputPlus()
411 val = (uint32_t)(READ_BIT(COMPx->CFGR1, COMP_CFGR1_INPSEL1 | COMP_CFGR1_INPSEL2)); in LL_COMP_GetInputPlus()
453 MODIFY_REG(COMPx->CFGR1, COMP_CFGR1_INMSEL | COMP_CFGR1_SCALEN | COMP_CFGR1_BRGEN, InputMinus); in LL_COMP_SetInputMinus()
479 …return (uint32_t)(READ_BIT(COMPx->CFGR1, COMP_CFGR1_INMSEL | COMP_CFGR1_SCALEN | COMP_CFGR1_BRGEN)… in LL_COMP_GetInputMinus()
495 MODIFY_REG(COMPx->CFGR1, COMP_CFGR1_HYST, InputHysteresis); in LL_COMP_SetInputHysteresis()
510 return (uint32_t)(READ_BIT(COMPx->CFGR1, COMP_CFGR1_HYST)); in LL_COMP_GetInputHysteresis()
532 MODIFY_REG(COMPx->CFGR1, COMP_CFGR1_POLARITY, OutputPolarity); in LL_COMP_SetOutputPolarity()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_system.h463 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS); in LL_SYSCFG_EnableFirewall()
473 return !(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS) == SYSCFG_CFGR1_FWDIS); in LL_SYSCFG_IsEnabledFirewall()
492 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
511 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
533 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
555 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
565 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); in LL_SYSCFG_EnableIT_FPU_IOC()
575 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
585 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); in LL_SYSCFG_EnableIT_FPU_UFC()
595 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); in LL_SYSCFG_EnableIT_FPU_OFC()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_comp.c289 comp_voltage_scaler_initialized = READ_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_SCALEN); in HAL_COMP_Init()
301 MODIFY_REG(hcomp->Instance->CFGR1, in HAL_COMP_Init()
315 if ((READ_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_SCALEN) != 0UL) && in HAL_COMP_Init()
381 WRITE_REG(hcomp->Instance->CFGR1, 0x00000000UL); in HAL_COMP_DeInit()
652 SET_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_EN); in HAL_COMP_Start()
706 CLEAR_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_EN); in HAL_COMP_Stop()
752 SET_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_EN); in HAL_COMP_Start_IT_OneShot()
787 if (READ_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_POLARITY) == 0UL) in HAL_COMP_Start_IT_OneShot()
789 SET_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_POLARITY); in HAL_COMP_Start_IT_OneShot()
793 CLEAR_BIT(hcomp->Instance->CFGR1, COMP_CFGR1_POLARITY); in HAL_COMP_Start_IT_OneShot()
[all …]
Dstm32h5xx_hal_dts.c291 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
303 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
309 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
313 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
316 …MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_HSREF_CLK_DIV, (hdts->Init.Divider << DTS_CFGR1_HSREF_… in HAL_DTS_Init()
317 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_SMP_TIME, hdts->Init.SamplingTime); in HAL_DTS_Init()
318 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_INTRIG_SEL, hdts->Init.TriggerInput); in HAL_DTS_Init()
347 CLEAR_REG(hdts->Instance->CFGR1); in HAL_DTS_DeInit()
629 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Start()
664 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Stop()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_system.h436 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
455 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
477 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
499 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
509 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); in LL_SYSCFG_EnableIT_FPU_IOC()
519 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
529 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); in LL_SYSCFG_EnableIT_FPU_UFC()
539 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); in LL_SYSCFG_EnableIT_FPU_OFC()
549 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4); in LL_SYSCFG_EnableIT_FPU_IDC()
559 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5); in LL_SYSCFG_EnableIT_FPU_IXC()
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_system.h506 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
525 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
538 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in LL_SYSCFG_EnableAnalogGpioSwitch()
550 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in LL_SYSCFG_DisableAnalogGpioSwitch()
569 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
587 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
597 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); in LL_SYSCFG_EnableIT_FPU_IOC()
607 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
617 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); in LL_SYSCFG_EnableIT_FPU_UFC()
627 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); in LL_SYSCFG_EnableIT_FPU_OFC()
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_adc.h1564 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
1581 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
1601 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
1616 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
1671 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
1721 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
1835 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
1865 uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
1892 return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
1912 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
Dstm32f0xx_hal.h351 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE))
357 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
358 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE_0; \
365 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
366 … SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1); \
381 … SYSCFG->CFGR1 |= (__PIN_REMAP__); \
384 … SYSCFG->CFGR1 &= ~(__PIN_REMAP__); \
396 … SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
400 … CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
485 … SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_IRDA_ENV_SEL); \
[all …]
Dstm32f0xx_ll_system.h350 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
363 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
378 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD, Source); in LL_SYSCFG_SetIRModEnvelopeSignal()
391 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD)); in LL_SYSCFG_GetIRModEnvelopeSignal()
417 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF00FFU) << 8U, (Remap & 0xFF00FF00U)); in LL_SYSCFG_SetRemapDMA_USART()
432 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_SPI2_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_SPI()
447 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_I2C1_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_I2C()
462 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_ADC_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_ADC()
495 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF00FFU) << 8U, (Remap & 0xFF00FF00U)); in LL_SYSCFG_SetRemapDMA_TIM()
508 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_PA11_PA12_RMP); in LL_SYSCFG_EnablePinRemap()
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h2009 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
2026 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
2045 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2060 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2117 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2170 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2341 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2370 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2397 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2416 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h2073 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
2090 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
2110 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2125 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2174 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT), LowPowerMode); in LL_ADC_SetLPModeAutoWait()
2218 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_WAIT)); in LL_ADC_GetLPModeAutoWait()
2464 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2492 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2519 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2539 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_adc.h1953 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
1970 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
1990 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2005 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2060 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2110 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2227 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2260 uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2287 return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
2307 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_adc.h2277 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
2294 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
2313 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2328 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2385 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2438 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2610 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2640 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2667 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2686 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
Dstm32u0xx_hal.h463 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
467 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYS…
471 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, \
479 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
537 SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
543 CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
556 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD);\
557 SET_BIT(SYSCFG->CFGR1, (__SOURCE__));\
560 #define __HAL_SYSCFG_GET_IRDA_ENV_SELECTION() ((SYSCFG->CFGR1) & 0x000000C0U)
566 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL);\
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h2286 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
2303 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
2322 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2337 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2394 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2447 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2618 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2647 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2674 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2694 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
Dstm32c0xx_hal.h419 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
423 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYS…
428 …MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, (SYSCFG_CFGR1_MEM_MODE_1 | SYSCFG_CFGR1_MEM_MODE_…
435 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
449 SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
455 CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
463 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD);\
464 SET_BIT(SYSCFG->CFGR1, (__SOURCE__));\
467 #define __HAL_SYSCFG_GET_IRDA_ENV_SELECTION() ((SYSCFG->CFGR1) & 0x000000C0U)
473 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL);\
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h2324 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
2341 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
2360 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2375 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2432 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2485 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2659 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2691 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2718 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2737 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
Dstm32g0xx_hal.h515 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
519 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYS…
524 …MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, (SYSCFG_CFGR1_MEM_MODE_1|SYSCFG_CFGR1_MEM_MODE_0))
531 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
574 … SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
578 … CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
604 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD);\
605 SET_BIT(SYSCFG->CFGR1, (__SOURCE__));\
608 #define __HAL_SYSCFG_GET_IRDA_ENV_SELECTION() ((SYSCFG->CFGR1) & 0x000000C0U)
614 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL);\
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_dts.c289 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
301 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
307 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
311 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
314 …MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_HSREF_CLK_DIV, (hdts->Init.Divider << DTS_CFGR1_HSREF_… in HAL_DTS_Init()
315 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_SMP_TIME, hdts->Init.SamplingTime); in HAL_DTS_Init()
316 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_INTRIG_SEL, hdts->Init.TriggerInput); in HAL_DTS_Init()
345 CLEAR_REG(hdts->Instance->CFGR1); in HAL_DTS_DeInit()
627 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Start()
662 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Stop()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dts.c182 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
194 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
200 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
204 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
207 …MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_HSREF_CLK_DIV, (hdts->Init.Divider << DTS_CFGR1_HSREF_… in HAL_DTS_Init()
208 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_SMP_TIME, hdts->Init.SamplingTime); in HAL_DTS_Init()
209 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_INTRIG_SEL, hdts->Init.TriggerInput); in HAL_DTS_Init()
238 CLEAR_REG(hdts->Instance->CFGR1); in HAL_DTS_DeInit()
520 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Start()
555 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Stop()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_adc.c702 MODIFY_REG(hadc->Instance->CFGR1, ADC_CFGR_FIELDS_1, tmpCFGR1); in HAL_ADC_Init()
716 MODIFY_REG(hadc->Instance->CFGR1, in HAL_ADC_Init()
758 MODIFY_REG(hadc->Instance->CFGR1, ADC_CFGR1_AUTDLY | ADC_CFGR1_DMNGT, tmpCFGR1); in HAL_ADC_Init()
902 …if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWD1CH | ADC_CFGR1_AWD1EN | ADC_CFGR1_AWD1SGL | ADC_CFGR1… in HAL_ADC_Init()
1017 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_AWD1CH | ADC_CFGR1_JAUTO | ADC_CFGR1_JAWD1EN | in HAL_ADC_DeInit()
1120 …hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWD1CH | ADC_CFGR1_AWD1EN | ADC_CFGR1_AWD1SGL | ADC_CFGR1_… in HAL_ADC_DeInit()
1652 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO) != 0UL) in HAL_ADC_Start()
1666 if (READ_BIT(tmp_adc_master->CFGR1, ADC_CFGR1_JAUTO) != 0UL) in HAL_ADC_Start()
1673 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO) != 0UL) in HAL_ADC_Start()
1793 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMNGT_0) != 0UL) in HAL_ADC_PollForConversion()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_adc.c546 MODIFY_REG(hadc->Instance->CFGR1, ADC_CFGR1_FIELDS_1, tmpCFGR1); in HAL_ADC_Init()
567 MODIFY_REG(hadc->Instance->CFGR1, ADC_CFGR1_FIELDS_2, tmpCFGR1); in HAL_ADC_Init()
727 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_AWD1CH | ADC_CFGR1_JAUTO | in HAL_ADC_DeInit()
1243 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO) != 0UL) in HAL_ADC_Start()
1258 if (READ_BIT(tmpADC_Master->CFGR1, ADC_CFGR1_JAUTO) != 0UL) in HAL_ADC_Start()
1265 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO) != 0UL) in HAL_ADC_Start()
1382 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMNGT_0) != 0UL) in HAL_ADC_PollForConversion()
1477 tmp_cfgr = READ_REG(hadc->Instance->CFGR1); in HAL_ADC_PollForConversion()
1483 tmp_cfgr = READ_REG(tmpADC_Master->CFGR1); in HAL_ADC_PollForConversion()
1487 tmp_cfgr = READ_REG(hadc->Instance->CFGR1); in HAL_ADC_PollForConversion()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h3385 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, tmp_resolution); in LL_ADC_SetResolution()
3405 uint32_t tmp_resolution = (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
3432 MODIFY_REG(ADCx->CFGR1, ADC4_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
3447 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC4_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
3505 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_AUTDLY, LowPowerMode); in LL_ADC_SetLowPowerMode()
3509 MODIFY_REG(ADCx->CFGR1, ADC4_CFGR1_WAIT, LowPowerMode); in LL_ADC_SetLowPowerMode()
3564 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_AUTDLY)); in LL_ADC_GetLowPowerMode()
3568 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC4_CFGR1_WAIT)); in LL_ADC_GetLowPowerMode()
4085 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
4089 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC4_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
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