Lines Matching refs:CFGR1

291     CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT);  in HAL_DTS_Init()
303     SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT);  in HAL_DTS_Init()
309     SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL);  in HAL_DTS_Init()
313     CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL);  in HAL_DTS_Init()
316 …MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_HSREF_CLK_DIV, (hdts->Init.Divider << DTS_CFGR1_HSREF_…  in HAL_DTS_Init()
317   MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_SMP_TIME, hdts->Init.SamplingTime);  in HAL_DTS_Init()
318   MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_INTRIG_SEL, hdts->Init.TriggerInput);  in HAL_DTS_Init()
347   CLEAR_REG(hdts->Instance->CFGR1);  in HAL_DTS_DeInit()
629       SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START);  in HAL_DTS_Start()
664       CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START);  in HAL_DTS_Stop()
728       SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START);  in HAL_DTS_Start_IT()
774       CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START);  in HAL_DTS_Stop_IT()