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Searched refs:CAN_MCR_SLEEP_Pos (Results 1 – 25 of 82) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f103x6.h5542 #define CAN_MCR_SLEEP_Pos (1U) macro
5543 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f103xb.h5604 #define CAN_MCR_SLEEP_Pos (1U) macro
5605 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f103xe.h6955 #define CAN_MCR_SLEEP_Pos (1U) macro
6956 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f103xg.h7025 #define CAN_MCR_SLEEP_Pos (1U) macro
7026 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f105xc.h5369 #define CAN_MCR_SLEEP_Pos (1U) macro
5370 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f042x6.h1045 #define CAN_MCR_SLEEP_Pos (1U) macro
1046 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f048xx.h1045 #define CAN_MCR_SLEEP_Pos (1U) macro
1046 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f072xb.h1120 #define CAN_MCR_SLEEP_Pos (1U) macro
1121 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f091xc.h1102 #define CAN_MCR_SLEEP_Pos (1U) macro
1103 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f098xx.h1102 #define CAN_MCR_SLEEP_Pos (1U) macro
1103 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f078xx.h1120 #define CAN_MCR_SLEEP_Pos (1U) macro
1121 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f378xx.h1478 #define CAN_MCR_SLEEP_Pos (1U) macro
1479 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f373xc.h1519 #define CAN_MCR_SLEEP_Pos (1U) macro
1520 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f302x8.h2432 #define CAN_MCR_SLEEP_Pos (1U) macro
2433 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f328xx.h2376 #define CAN_MCR_SLEEP_Pos (1U) macro
2377 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f302xc.h2627 #define CAN_MCR_SLEEP_Pos (1U) macro
2628 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f303x8.h2377 #define CAN_MCR_SLEEP_Pos (1U) macro
2378 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f358xx.h3037 #define CAN_MCR_SLEEP_Pos (1U) macro
3038 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f303xc.h3079 #define CAN_MCR_SLEEP_Pos (1U) macro
3080 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f302xe.h2650 #define CAN_MCR_SLEEP_Pos (1U) macro
2651 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h1724 #define CAN_MCR_SLEEP_Pos (1U) macro
1725 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f205xx.h1674 #define CAN_MCR_SLEEP_Pos (1U) macro
1675 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h1672 #define CAN_MCR_SLEEP_Pos (1U) macro
1673 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
Dstm32f412cx.h1593 #define CAN_MCR_SLEEP_Pos (1U) macro
1594 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h1803 #define CAN_MCR_SLEEP_Pos (1U) macro
1804 #define CAN_MCR_SLEEP_Msk (0x1UL << CAN_MCR_SLEEP_Pos) /*!< 0x00000002 */

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