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Searched refs:APBSMENR2 (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h1371 #define __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SYSCFGSMEN)
1372 #define __HAL_RCC_TIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM1SMEN)
1373 #define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
1374 #define __HAL_RCC_USART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_USART1SMEN)
1375 #define __HAL_RCC_TIM14_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM14SMEN)
1376 #define __HAL_RCC_TIM16_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM16SMEN)
1377 #define __HAL_RCC_TIM17_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM17SMEN)
1378 #define __HAL_RCC_ADC_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_ADCSMEN)
1380 #define __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SYSCFGSMEN)
1381 #define __HAL_RCC_TIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM1SMEN)
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Dstm32c0xx_ll_bus.h710 SET_BIT(RCC->APBSMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
712 tmpreg = READ_BIT(RCC->APBSMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
740 CLEAR_BIT(RCC->APBSMENR2, Periphs); in LL_APB1_GRP2_DisableClockStopSleep()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h2150 #define __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SYSCFGSMEN)
2151 #define __HAL_RCC_TIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM1SMEN)
2152 #define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
2153 #define __HAL_RCC_USART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_USART1SMEN)
2154 #define __HAL_RCC_TIM14_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM14SMEN)
2156 #define __HAL_RCC_TIM15_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM15SMEN)
2158 #define __HAL_RCC_TIM16_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM16SMEN)
2159 #define __HAL_RCC_TIM17_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM17SMEN)
2160 #define __HAL_RCC_ADC_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_ADCSMEN)
2162 #define __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SYSCFGSMEN)
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Dstm32g0xx_ll_bus.h1075 SET_BIT(RCC->APBSMENR2, Periphs); in LL_APB2_GRP1_EnableClockStopSleep()
1077 tmpreg = READ_BIT(RCC->APBSMENR2, Periphs); in LL_APB2_GRP1_EnableClockStopSleep()
1107 CLEAR_BIT(RCC->APBSMENR2, Periphs); in LL_APB2_GRP1_DisableClockStopSleep()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h1976 #define __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SYSCFGSMEN)
1979 #define __HAL_RCC_TIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM1SMEN)
1980 #define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
1981 #define __HAL_RCC_USART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_USART1SMEN)
1982 #define __HAL_RCC_TIM15_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM15SMEN)
1983 #define __HAL_RCC_TIM16_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM16SMEN)
1984 #define __HAL_RCC_ADC_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_ADCSMEN)
1986 #define __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SYSCFGSMEN)
1989 #define __HAL_RCC_TIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_TIM1SMEN)
1990 #define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR2 , RCC_APBSMENR2_SPI1SMEN)
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Dstm32u0xx_ll_bus.h1040 SET_BIT(RCC->APBSMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
1042 tmpreg = READ_BIT(RCC->APBSMENR2, Periphs); in LL_APB1_GRP2_EnableClockStopSleep()
1071 CLEAR_BIT(RCC->APBSMENR2, Periphs); in LL_APB1_GRP2_DisableClockStopSleep()
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h360 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32c031xx.h362 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32c071xx.h385 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h362 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g050xx.h367 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g070xx.h366 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g031xx.h387 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g041xx.h388 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g051xx.h427 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g061xx.h428 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g071xx.h444 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g081xx.h445 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g0b0xx.h374 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g0c1xx.h524 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
Dstm32g0b1xx.h523 …__IO uint32_t APBSMENR2; /*!< RCC APB peripheral clocks enable in sleep mode register2, … member
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h492 …__IO uint32_t APBSMENR2; /*!< RCC APB2 peripheral clocks enable in sleep mode register, … member
Dstm32u083xx.h552 …__IO uint32_t APBSMENR2; /*!< RCC APB2 peripheral clocks enable in sleep mode register, … member
Dstm32u073xx.h518 …__IO uint32_t APBSMENR2; /*!< RCC APB2 peripheral clocks enable in sleep mode register, … member