Home
last modified time | relevance | path

Searched refs:ADC_TR1_LT1_Pos (Results 1 – 25 of 83) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h722 #define ADC_TR1_LT1_Pos (0U) macro
723 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
725 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
726 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
727 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
728 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
729 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
730 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
731 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
732 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f030x8.h738 #define ADC_TR1_LT1_Pos (0U) macro
739 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
741 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
742 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
743 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
744 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
745 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
746 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
747 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
748 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f070x6.h767 #define ADC_TR1_LT1_Pos (0U) macro
768 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
770 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
771 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
772 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
773 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
774 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
775 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
776 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
777 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f031x6.h732 #define ADC_TR1_LT1_Pos (0U) macro
733 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
735 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
736 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
737 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
738 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
739 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
740 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
741 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
742 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f030xc.h754 #define ADC_TR1_LT1_Pos (0U) macro
755 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
757 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
758 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
759 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
760 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
761 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
762 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
763 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
764 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f038xx.h731 #define ADC_TR1_LT1_Pos (0U) macro
732 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
734 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
735 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
736 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
737 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
738 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
739 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
740 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
741 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f070xb.h790 #define ADC_TR1_LT1_Pos (0U) macro
791 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
793 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
794 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
795 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
796 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
797 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
798 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
799 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
800 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f058xx.h837 #define ADC_TR1_LT1_Pos (0U) macro
838 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
840 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
841 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
842 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
843 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
844 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
845 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
846 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
847 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f051x8.h838 #define ADC_TR1_LT1_Pos (0U) macro
839 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
841 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
842 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
843 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
844 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
845 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
846 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
847 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
848 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f071xb.h872 #define ADC_TR1_LT1_Pos (0U) macro
873 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
875 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
876 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
877 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
878 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
879 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
880 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
881 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
882 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f042x6.h901 #define ADC_TR1_LT1_Pos (0U) macro
902 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
904 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
905 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
906 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
907 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
908 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
909 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
910 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
911 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f048xx.h901 #define ADC_TR1_LT1_Pos (0U) macro
902 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
904 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
905 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
906 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
907 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
908 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
909 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
910 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
911 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f072xb.h976 #define ADC_TR1_LT1_Pos (0U) macro
977 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
979 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
980 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
981 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
982 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
983 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
984 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
985 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
986 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f091xc.h958 #define ADC_TR1_LT1_Pos (0U) macro
959 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
961 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
962 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
963 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
964 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
965 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
966 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
967 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
968 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f098xx.h958 #define ADC_TR1_LT1_Pos (0U) macro
959 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
961 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
962 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
963 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
964 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
965 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
966 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
967 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
968 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f078xx.h976 #define ADC_TR1_LT1_Pos (0U) macro
977 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
979 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
980 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
981 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
982 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
983 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
984 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
985 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
986 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h1095 #define ADC_TR1_LT1_Pos (0U) macro
1096 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1098 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1099 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1100 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1101 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1102 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1103 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1104 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1105 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f318xx.h1096 #define ADC_TR1_LT1_Pos (0U) macro
1097 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1099 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1100 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1101 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1102 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1103 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1104 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1105 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1106 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f302x8.h1204 #define ADC_TR1_LT1_Pos (0U) macro
1205 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1207 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1208 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1209 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1210 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1211 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1212 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1213 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1214 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32f328xx.h1155 #define ADC_TR1_LT1_Pos (0U) macro
1156 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1158 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1159 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1160 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1161 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1162 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1163 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1164 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1165 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h1341 #define ADC_TR1_LT1_Pos (0U) macro
1342 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1344 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1345 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1346 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1347 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1348 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1349 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1350 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1351 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32wb30xx.h1340 #define ADC_TR1_LT1_Pos (0U) macro
1341 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1343 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1344 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1345 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1346 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1347 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1348 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1349 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1350 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32wb35xx.h1532 #define ADC_TR1_LT1_Pos (0U) macro
1533 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1535 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1536 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1537 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1538 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1539 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1540 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1541 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1542 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h1446 #define ADC_TR1_LT1_Pos (0U) macro
1447 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1449 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1450 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1451 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1452 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1453 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1454 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1455 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1456 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]
Dstm32l412xx.h1411 #define ADC_TR1_LT1_Pos (0U) macro
1412 #define ADC_TR1_LT1_Msk (0xFFFUL << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */
1414 #define ADC_TR1_LT1_0 (0x001UL << ADC_TR1_LT1_Pos) /*!< 0x00000001 */
1415 #define ADC_TR1_LT1_1 (0x002UL << ADC_TR1_LT1_Pos) /*!< 0x00000002 */
1416 #define ADC_TR1_LT1_2 (0x004UL << ADC_TR1_LT1_Pos) /*!< 0x00000004 */
1417 #define ADC_TR1_LT1_3 (0x008UL << ADC_TR1_LT1_Pos) /*!< 0x00000008 */
1418 #define ADC_TR1_LT1_4 (0x010UL << ADC_TR1_LT1_Pos) /*!< 0x00000010 */
1419 #define ADC_TR1_LT1_5 (0x020UL << ADC_TR1_LT1_Pos) /*!< 0x00000020 */
1420 #define ADC_TR1_LT1_6 (0x040UL << ADC_TR1_LT1_Pos) /*!< 0x00000040 */
1421 #define ADC_TR1_LT1_7 (0x080UL << ADC_TR1_LT1_Pos) /*!< 0x00000080 */
[all …]

1234