Home
last modified time | relevance | path

Searched refs:ADC_OFR1_OFFSET1_EN_Pos (Results 1 – 25 of 67) sorted by relevance

123

/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h1438 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1439 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f318xx.h1439 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1440 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f302x8.h1547 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1548 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f328xx.h1498 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1499 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f302xc.h1582 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1583 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f303x8.h1499 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1500 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f358xx.h1572 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1573 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f303xc.h1614 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1615 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32f302xe.h1673 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1674 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h1683 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1684 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32wb30xx.h1682 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1683 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32wb35xx.h1874 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1875 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32wb55xx.h1920 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1921 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32wb5mxx.h1920 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1921 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h1741 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1742 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32g411xc.h1778 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1779 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32g441xx.h1899 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1900 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32gbk1cb.h1851 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1852 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32g431xx.h1865 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1866 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32g4a1xx.h1979 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1980 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32g491xx.h1945 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1946 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32g473xx.h2034 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
2035 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32g471xx.h1956 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1957 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h1788 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1789 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */
Dstm32l412xx.h1753 #define ADC_OFR1_OFFSET1_EN_Pos (31U) macro
1754 #define ADC_OFR1_OFFSET1_EN_Msk (0x1UL << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */

123