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Searched refs:ADC_CSR_AWD1_MST_Pos (Results 1 – 25 of 106) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h1879 #define ADC_CSR_AWD1_MST_Pos (7U) macro
1880 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f318xx.h1880 #define ADC_CSR_AWD1_MST_Pos (7U) macro
1881 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f302x8.h1988 #define ADC_CSR_AWD1_MST_Pos (7U) macro
1989 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f328xx.h1939 #define ADC_CSR_AWD1_MST_Pos (7U) macro
1940 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f302xc.h2023 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2024 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f303x8.h1940 #define ADC_CSR_AWD1_MST_Pos (7U) macro
1941 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f358xx.h2165 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2166 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f303xc.h2207 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2208 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f302xe.h2114 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2115 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f303xe.h2318 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2319 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f398xx.h2274 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2275 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32f334x8.h2125 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2126 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h1963 #define ADC_CSR_AWD1_MST_Pos (7U) macro
1964 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g411xc.h2000 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2001 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g441xx.h2121 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2122 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32gbk1cb.h2073 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2074 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g431xx.h2087 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2088 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g4a1xx.h2201 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2202 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g491xx.h2167 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2168 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g473xx.h2256 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2257 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g471xx.h2178 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2179 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32g483xx.h2290 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2291 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h2084 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2085 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
Dstm32l412xx.h2049 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2050 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h2564 #define ADC_CSR_AWD1_MST_Pos (7U) macro
2565 #define ADC_CSR_AWD1_MST_Msk (0x1UL << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */

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