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Searched refs:LPTIM_CCMR1_CC1P_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_lptim.h982 …MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, ((Polarity >> LPTIM_CCMR1_CC1P_Pos) << LPTIM_CFGR_WAVP… in LL_LPTIM_OC_SetPolarity()
1009 …2_t)((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL) >> LPTIM_CFGR_WAVPOL_Pos) << LPTIM_CCMR1_CC1P_Pos); in LL_LPTIM_OC_GetPolarity()
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_lptim.h931 …MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, ((Polarity >> LPTIM_CCMR1_CC1P_Pos) << LPTIM_CFGR_WAVP… in LL_LPTIM_OC_SetPolarity()
956 …2_t)((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL) >> LPTIM_CFGR_WAVPOL_Pos) << LPTIM_CCMR1_CC1P_Pos); in LL_LPTIM_OC_GetPolarity()
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_lptim.c3543 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC1P_Pos; in LPTIM_OC1_SetConfig()
3653 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_lptim.c3570 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC1P_Pos; in LPTIM_OC1_SetConfig()
3681 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_lptim.c3552 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC1P_Pos; in LPTIM_OC1_SetConfig()
3663 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h4908 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
4909 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
4911 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
4912 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32wba52xx.h8504 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
8505 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
8507 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
8508 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32wba54xx.h8737 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
8738 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
8740 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
8741 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32wba55xx.h8737 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
8738 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
8740 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
8741 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8211 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
8212 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
8214 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
8215 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32h562xx.h10897 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
10898 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
10900 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
10901 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32h563xx.h12981 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
12982 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
12984 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
12985 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32h573xx.h13416 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
13417 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
13419 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
13420 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h11344 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
11345 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
11347 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
11348 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u535xx.h10944 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
10945 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
10947 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
10948 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u575xx.h11967 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
11968 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
11970 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
11971 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u5a5xx.h12724 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
12725 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
12727 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
12728 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u585xx.h12416 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
12417 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
12419 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
12420 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u5f7xx.h13773 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
13774 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
13776 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
13777 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u595xx.h12275 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
12276 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
12278 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
12279 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u599xx.h15994 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
15995 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
15997 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
15998 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u5g7xx.h14222 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
14223 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
14225 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
14226 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u5a9xx.h16443 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
16444 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
16446 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
16447 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u5g9xx.h17348 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
17349 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
17351 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
17352 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…
Dstm32u5f9xx.h16899 #define LPTIM_CCMR1_CC1P_Pos (2U) macro
16900 #define LPTIM_CCMR1_CC1P_Msk (0x3UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x0000000C…
16902 #define LPTIM_CCMR1_CC1P_0 (0x1UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000004…
16903 #define LPTIM_CCMR1_CC1P_1 (0x2UL << LPTIM_CCMR1_CC1P_Pos) /*!< 0x00000008…