Searched refs:DMA_IFCR_CGIF4_Pos (Results 1 – 25 of 149) sorted by relevance
123456
2954 #define DMA_IFCR_CGIF4_Pos (12U) macro2955 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
3016 #define DMA_IFCR_CGIF4_Pos (12U) macro3017 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
3168 #define DMA_IFCR_CGIF4_Pos (12U) macro3169 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
3003 #define DMA_IFCR_CGIF4_Pos (12U) macro3004 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
3515 #define DMA_IFCR_CGIF4_Pos (12U) macro3516 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
3411 #define DMA_IFCR_CGIF4_Pos (12U) macro3412 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
3487 #define DMA_IFCR_CGIF4_Pos (12U) macro3488 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1058 #define DMA_IFCR_CGIF4_Pos (12U) macro1059 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1080 #define DMA_IFCR_CGIF4_Pos (12U) macro1081 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1103 #define DMA_IFCR_CGIF4_Pos (12U) macro1104 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1135 #define DMA_IFCR_CGIF4_Pos (12U) macro1136 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1099 #define DMA_IFCR_CGIF4_Pos (12U) macro1100 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1074 #define DMA_IFCR_CGIF4_Pos (12U) macro1075 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1073 #define DMA_IFCR_CGIF4_Pos (12U) macro1074 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1514 #define DMA_IFCR_CGIF4_Pos (12U) macro1515 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1212 #define DMA_IFCR_CGIF4_Pos (12U) macro1213 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1253 #define DMA_IFCR_CGIF4_Pos (12U) macro1254 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1095 #define DMA_IFCR_CGIF4_Pos (12U) macro1096 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1111 #define DMA_IFCR_CGIF4_Pos (12U) macro1112 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1101 #define DMA_IFCR_CGIF4_Pos (12U) macro1102 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1340 #define DMA_IFCR_CGIF4_Pos (12U) macro1341 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1176 #define DMA_IFCR_CGIF4_Pos (12U) macro1177 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1304 #define DMA_IFCR_CGIF4_Pos (12U) macro1305 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
1412 #define DMA_IFCR_CGIF4_Pos (12U) macro1413 #define DMA_IFCR_CGIF4_Msk (0x1UL << DMA_IFCR_CGIF4_Pos) /*!< 0x00001000 */
