Searched refs:DMA_IFCR_CGIF2_Pos (Results 1 – 25 of 149) sorted by relevance
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2930 #define DMA_IFCR_CGIF2_Pos (4U) macro2931 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
2992 #define DMA_IFCR_CGIF2_Pos (4U) macro2993 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
3144 #define DMA_IFCR_CGIF2_Pos (4U) macro3145 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
2979 #define DMA_IFCR_CGIF2_Pos (4U) macro2980 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
3491 #define DMA_IFCR_CGIF2_Pos (4U) macro3492 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
3387 #define DMA_IFCR_CGIF2_Pos (4U) macro3388 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
3463 #define DMA_IFCR_CGIF2_Pos (4U) macro3464 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1034 #define DMA_IFCR_CGIF2_Pos (4U) macro1035 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1056 #define DMA_IFCR_CGIF2_Pos (4U) macro1057 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1079 #define DMA_IFCR_CGIF2_Pos (4U) macro1080 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1111 #define DMA_IFCR_CGIF2_Pos (4U) macro1112 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1075 #define DMA_IFCR_CGIF2_Pos (4U) macro1076 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1050 #define DMA_IFCR_CGIF2_Pos (4U) macro1051 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1049 #define DMA_IFCR_CGIF2_Pos (4U) macro1050 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1490 #define DMA_IFCR_CGIF2_Pos (4U) macro1491 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1188 #define DMA_IFCR_CGIF2_Pos (4U) macro1189 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1229 #define DMA_IFCR_CGIF2_Pos (4U) macro1230 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1071 #define DMA_IFCR_CGIF2_Pos (4U) macro1072 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1087 #define DMA_IFCR_CGIF2_Pos (4U) macro1088 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1077 #define DMA_IFCR_CGIF2_Pos (4U) macro1078 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1316 #define DMA_IFCR_CGIF2_Pos (4U) macro1317 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1152 #define DMA_IFCR_CGIF2_Pos (4U) macro1153 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1280 #define DMA_IFCR_CGIF2_Pos (4U) macro1281 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
1388 #define DMA_IFCR_CGIF2_Pos (4U) macro1389 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
