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Searched refs:scg_spll_config_t (Results 1 – 25 of 36) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/
Dclock_config.h61 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockVLPR;
102 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
143 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockHSRUN;
Dclock_config.c186 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockVLPR = {
298 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN = {
418 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockHSRUN = {
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/project_template/
Dclock_config.h61 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockVLPR;
102 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
143 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockHSRUN;
Dclock_config.c193 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockVLPR = {
304 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN = {
433 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockHSRUN = {
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dclock_config.h61 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
102 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockHSRUN;
143 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockVLPR;
Dclock_config.c216 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
347 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockHSRUN =
463 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockVLPR =
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/project_template/
Dclock_config.h61 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockHSRUN;
102 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockVLPR;
Dclock_config.c230 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockHSRUN = {
341 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockVLPR = {
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/project_template/
Dclock_config.h60 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
Dclock_config.c184 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/project_template/
Dclock_config.h60 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
Dclock_config.c164 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/project_template/
Dclock_config.h60 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
Dclock_config.c164 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/project_template/
Dclock_config.h60 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
Dclock_config.c164 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/project_template/
Dclock_config.h60 extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
Dclock_config.c184 const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h623 } scg_spll_config_t; typedef
1233 status_t CLOCK_InitSysPll(const scg_spll_config_t *config);
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h629 } scg_spll_config_t; typedef
1239 status_t CLOCK_InitSysPll(const scg_spll_config_t *config);
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h629 } scg_spll_config_t; typedef
1239 status_t CLOCK_InitSysPll(const scg_spll_config_t *config);
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.h628 } scg_spll_config_t; typedef
1300 status_t CLOCK_InitSysPll(const scg_spll_config_t *config);
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.h628 } scg_spll_config_t; typedef
1300 status_t CLOCK_InitSysPll(const scg_spll_config_t *config);
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/project_template/
Dclock_config.c75 const scg_spll_config_t g_scgSysPllConfig = {.enableMode = kSCG_SysPllEnable,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/project_template/
Dclock_config.c75 const scg_spll_config_t g_scgSysPllConfig = {.enableMode = kSCG_SysPllEnable,

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