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Searched refs:kSCG_LpFllRange48M (Results 1 – 22 of 22) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/
Dclock_config.c190 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
298 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/project_template/
Dclock_config.c183 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
285 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/project_template/
Dclock_config.c169 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
372 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/
Dclock_config.c169 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
377 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/project_template/
Dclock_config.c156 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/project_template/
Dclock_config.c161 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/project_template/
Dclock_config.c161 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/project_template/
Dclock_config.c156 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/project_template/
Dclock_config.c161 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/project_template/
Dclock_config.c161 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/project_template/
Dclock_config.c156 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/project_template/
Dclock_config.c161 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/project_template/
Dclock_config.c154 .range = kSCG_LpFllRange48M, /* LPFLL is trimmed to 48MHz */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.h510 kSCG_LpFllRange48M, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.h502 kSCG_LpFllRange48M, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.h514 kSCG_LpFllRange48M, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.h521 kSCG_LpFllRange48M, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.h525 kSCG_LpFllRange48M = 0U, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/drivers/
Dfsl_clock.h563 kSCG_LpFllRange48M, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.h526 kSCG_LpFllRange48M = 0U, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/drivers/
Dfsl_clock.h570 kSCG_LpFllRange48M, /*!< LPFLL is trimmed to 48MHz. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/drivers/
Dfsl_clock.h619 kSCG_LpFllRange48M, /*!< LPFLL is trimmed to 48MHz. */ enumerator