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Searched refs:CMD_DDR (Results 1 – 25 of 38) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbimxrt1050/xip/
Devkbimxrt1050_flexspi_nor_config.c51 … [0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
57 … [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
58 … [4 * 1 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
59 … [4 * 1 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
60 … [4 * 1 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x70),
63 … [4 * 2 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
70 … [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
71 … [4 * 3 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
72 … [4 * 3 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
73 … [4 * 3 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[all …]
Devkbimxrt1050_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt595/flash_config/
Dflash_config.c53 [0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xEE, CMD_DDR, FLEXSPI_8PAD, 0x11),
61 … [4 * 2 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x05, CMD_DDR, FLEXSPI_8PAD, 0xFA),
69 … [4 * 4 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x06, CMD_DDR, FLEXSPI_8PAD, 0xF9),
72 … [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x21, CMD_DDR, FLEXSPI_8PAD, 0xDE),
81 … [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xDC, CMD_DDR, FLEXSPI_8PAD, 0x23),
85 … [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x12, CMD_DDR, FLEXSPI_8PAD, 0xED),
89 … [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x60, CMD_DDR, FLEXSPI_8PAD, 0x9F),
Dflash_config.h43 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt685/flash_config/
Dflash_config.h30 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/mimxrt685audevk/flash_config/
Dflash_config.h30 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1064/xip/
Devkmimxrt1064_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1020/xip/
Devkmimxrt1020_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1170/xip/
Devkmimxrt1170_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1015/xip/
Devkmimxrt1015_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1010/xip/
Devkmimxrt1010_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1060/xip/
Devkmimxrt1060_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbmimxrt1060/xip/
Devkbmimxrt1060_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbmimxrt1170/xip/
Devkbmimxrt1170_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1024/xip/
Devkmimxrt1024_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1040/xip/
Devkmimxrt1040_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1160/xip/
Devkmimxrt1160_flexspi_nor_config.h41 #define CMD_DDR 0x21 macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1024/cmsis_pack_flash_algo/Sources/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_romapi.h67 #define CMD_DDR 0x21U macro

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