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Searched refs:val (Results 1 – 25 of 35) sorted by relevance

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/hal_microchip-latest/mec5/drivers/
Dmec_i3c_pvt.c238 void _i3c_cmd_queue_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val) in _i3c_cmd_queue_threshold_set() argument
241 regs->QUE_THLD_CTRL |= (val << QUEUE_THLD_CMD_QUEUE_BITPOS); in _i3c_cmd_queue_threshold_set()
249 void _i3c_ibi_data_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val) in _i3c_ibi_data_threshold_set() argument
252 regs->QUE_THLD_CTRL |= (val << QUEUE_THLD_IBI_DATA_BITPOS); in _i3c_ibi_data_threshold_set()
260 void _i3c_ibi_status_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val) in _i3c_ibi_status_threshold_set() argument
263 regs->QUE_THLD_CTRL |= (val << QUEUE_THLD_IBI_STATUS_BITPOS); in _i3c_ibi_status_threshold_set()
271 void _i3c_tx_buf_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val) in _i3c_tx_buf_threshold_set() argument
274 regs->DB_THLD_CTRL |= (val << DATA_BUF_THLD_TX_FIFO_EMPTY_BITPOS); in _i3c_tx_buf_threshold_set()
282 void _i3c_rx_buf_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val) in _i3c_rx_buf_threshold_set() argument
285 regs->DB_THLD_CTRL |= (val << DATA_BUF_THLD_RX_FIFO_BITPOS); in _i3c_rx_buf_threshold_set()
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Dmec_gpio.c426 uint32_t mec_hal_gpio_set_ctrl_property(uint32_t ctrl, uint8_t prop_id, uint8_t val) in mec_hal_gpio_set_ctrl_property() argument
435 ctrl = (ctrl & ~(msk0 << bpos)) | (((uint32_t)val & msk0) << bpos); in mec_hal_gpio_set_ctrl_property()
465 int mec_hal_gpio_set_property(uint32_t pin, uint8_t prop_id, uint8_t val) in mec_hal_gpio_set_property() argument
486 | (((uint32_t)val & msk0) << bpos)); in mec_hal_gpio_set_property()
522 uint32_t val = gprops[n].val & mask; in mec_hal_gpio_set_props() local
525 ctrl2 = (ctrl2 & ~(mask << bitpos)) | (val << bitpos); in mec_hal_gpio_set_props()
527 ctrl = (ctrl & ~(mask << bitpos)) | (val << bitpos); in mec_hal_gpio_set_props()
539 uint32_t val = MEC_GPIO_CTRL_PUD_NONE; in pull_config() local
543 val = MEC_GPIO_CTRL_PUD_PULLUP; in pull_config()
546 val = MEC_GPIO_CTRL_PUD_PULLDN; in pull_config()
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Dmec_vbat.c73 int mec_hal_bbram_rd8(uint16_t byte_ofs, uint8_t *val) in mec_hal_bbram_rd8() argument
75 if (!val || (byte_ofs >= MEC_VBAT_MEM_SIZE)) { in mec_hal_bbram_rd8()
79 *val = MEC_VBATM->VBMEM[byte_ofs]; in mec_hal_bbram_rd8()
84 int mec_hal_bbram_wr8(uint16_t byte_ofs, uint8_t val) in mec_hal_bbram_wr8() argument
90 MEC_VBATM->VBMEM[byte_ofs] = val; in mec_hal_bbram_wr8()
95 int mec_hal_bbram_rd32(uint16_t byte_ofs, uint32_t *val) in mec_hal_bbram_rd32() argument
99 if (!val || (byte_ofs >= MEC_VBAT_MEM_SIZE)) { in mec_hal_bbram_rd32()
112 *val = r; in mec_hal_bbram_rd32()
117 int mec_hal_bbram_wr32(uint16_t byte_ofs, uint32_t val) in mec_hal_bbram_wr32() argument
124 MEC_MMCR32(&MEC_VBATM->VBMEM[byte_ofs]) = val; in mec_hal_bbram_wr32()
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Dmec_ecs.c78 uint32_t msk, temp, val; in mec_hal_ecs_debug_port() local
83 val = 0u; in mec_hal_ecs_debug_port()
87 val = MEC_BIT(MEC_ECS_DBG_CTRL_EN_Pos) | (uint32_t)MEC_ECS_DBG_CTRL_CFG_JTAG; in mec_hal_ecs_debug_port()
91 val = MEC_BIT(MEC_ECS_DBG_CTRL_EN_Pos) | (uint32_t)MEC_ECS_DBG_CTRL_CFG_SWD_ONLY; in mec_hal_ecs_debug_port()
95 val = MEC_BIT(MEC_ECS_DBG_CTRL_EN_Pos) | (uint32_t)MEC_ECS_DBG_CTRL_CFG_SWD_SWV; in mec_hal_ecs_debug_port()
102 temp |= val; in mec_hal_ecs_debug_port()
114 uint32_t msk = 0, val = 0; in mec_hal_ecs_analog_comparator_config() local
118 val |= MEC_BIT(MEC_ECS_CMPSC_DSLP0_Pos); in mec_hal_ecs_analog_comparator_config()
122 val |= MEC_BIT(MEC_ECS_CMPSC_DSLP1_Pos); in mec_hal_ecs_analog_comparator_config()
125 MEC_ECS->CMPSC = (MEC_ECS->CMPSC & (uint32_t)~msk) | val; in mec_hal_ecs_analog_comparator_config()
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Dmec_espi_vw.c629 uint32_t val = ((config >> MEC_ESPI_VW_CFG_IRQSEL_POS) & MEC_ESPI_VW_CFG_IRQSEL_MSK0); in mec_hal_espi_vw_ct_config() local
631 val = xlat_isel(val); in mec_hal_espi_vw_ct_config()
633 regval |= (val << bpos) & msk; in mec_hal_espi_vw_ct_config()
640 uint8_t widx, uint8_t val) in mec_hal_espi_vw_ct_wire_set() argument
648 if (val) { in mec_hal_espi_vw_ct_wire_set()
658 uint8_t widx, uint8_t *val) in mec_hal_espi_vw_ct_wire_get() argument
660 if (!vwbase || !val || (ctidx > MEC_CTVW_IDX10) || (widx > 3)) { in mec_hal_espi_vw_ct_wire_get()
666 *val = (uint8_t)((ctvw->STATES >> (widx * 8u)) & 0x1u); in mec_hal_espi_vw_ct_wire_get()
673 uint8_t val, uint8_t msk) in mec_hal_espi_vw_ct_group_set() argument
675 if (!vwbase || !val || (ctidx > MEC_CTVW_IDX10)) { in mec_hal_espi_vw_ct_group_set()
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Dmec_espi_vw.h184 uint8_t widx, uint8_t val);
186 uint8_t widx, uint8_t *val);
188 uint8_t val, uint8_t msk);
190 uint8_t *val);
193 uint8_t widx, uint8_t val, uint32_t flags);
195 uint8_t widx, uint8_t *val);
198 uint8_t widx, uint8_t *val);
200 uint8_t val, uint8_t msk, uint32_t flags);
202 uint8_t *val);
248 uint8_t val; /* VWire's value (0 or 1) */ member
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Dmec_i3c_pvt.h586 void _i3c_cmd_queue_buf_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
587 void _i3c_tx_fifo_empty_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
588 void _i3c_rx_buf_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
589 void _i3c_tx_buf_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
590 void _i3c_tx_start_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
591 void _i3c_rx_start_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
598 void _i3c_cmd_queue_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
599 void _i3c_ibi_data_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
600 void _i3c_ibi_status_threshold_set(struct mec_i3c_host_regs *regs, uint32_t val);
643 void _i3c_host_dma_tx_burst_length_set(struct mec_i3c_host_regs *regs, uint32_t val);
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Dmec_kbc.c71 uint8_t ctrl = 0u, msk = 0u, val = 0u; in mec_hal_kbc_init() local
87 val = (flags & MEC_KBC_PORT92_EN) ? 1 : 0; in mec_hal_kbc_init()
88 port92h_ctrl(val); in mec_hal_kbc_init()
129 val |= MEC_BIT(MEC_KBC_KESTATUS_UD0_Pos); in mec_hal_kbc_init()
136 val |= MEC_BIT(MEC_KBC_KESTATUS_UD1_Pos); in mec_hal_kbc_init()
143 val |= MEC_BIT(MEC_KBC_KESTATUS_UD2_Pos); in mec_hal_kbc_init()
146 val |= MEC_BIT(MEC_KBC_KESTATUS_UD2_Pos + 1); in mec_hal_kbc_init()
151 base->KESTATUS = (base->KESTATUS & ~msk) | val; in mec_hal_kbc_init()
314 void mec_hal_kbc_status_wr(struct mec_kbc_regs *base, uint8_t val, uint8_t msk) in mec_hal_kbc_status_wr() argument
322 base->KESTATUS = (base->KESTATUS & ~msk) | (val & msk); in mec_hal_kbc_status_wr()
Dmec_vbat_api.h57 int mec_hal_bbram_rd8(uint16_t byte_ofs, uint8_t *val);
58 int mec_hal_bbram_wr8(uint16_t byte_ofs, uint8_t val);
60 int mec_hal_bbram_rd32(uint16_t byte_ofs, uint32_t *val);
61 int mec_hal_bbram_wr32(uint16_t byte_ofs, uint32_t val);
Dmec_uart.c163 uint8_t val; in mec_hal_uart_parity_set() local
169 val = uart_parity_tbl[parity]; in mec_hal_uart_parity_set()
172 | val; in mec_hal_uart_parity_set()
201 uint8_t val; in mec_hal_uart_word_len_set() local
207 val = uart_word_len_tbl[word_len]; in mec_hal_uart_word_len_set()
209 base->LCR = (base->LCR & (uint8_t)~MEC_UART_LCR_WORD_LEN_Msk) | val; in mec_hal_uart_word_len_set()
341 uint32_t val = ((config & MEC5_UART_CFG_WORD_LEN_MSK) >> MEC5_UART_CFG_WORD_LEN_POS); in prog_word_len() local
343 val = (val << MEC_UART_LCR_WORD_LEN_Pos) & MEC_UART_LCR_WORD_LEN_Msk; in prog_word_len()
344 regs->LCR = (regs->LCR & (uint8_t)~MEC_UART_LCR_WORD_LEN_Msk) | (uint8_t)(val & 0xffu); in prog_word_len()
349 uint32_t val = ((config & MEC5_UART_CFG_PARITY_MSK) >> MEC5_UART_CFG_PARITY_POS); in prog_parity() local
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Dmec_gpio_api.h191 uint8_t val; member
313 uint32_t mec_hal_gpio_set_ctrl_property(uint32_t ctrl, uint8_t prop_id, uint8_t val);
344 int mec_hal_gpio_set_ctrl_mask(uint32_t pin, uint32_t val, uint32_t mask);
356 int mec_hal_gpio_ctrl2_mask(const uint32_t pin, uint32_t val, uint32_t mask);
372 int mec_hal_gpio_parin_port(const uint8_t port, uint32_t *val);
373 int mec_hal_gpio_parin_by_pin(uint32_t pin, uint32_t *val);
374 int mec_hal_gpio_parout_port_get(const uint8_t port, uint32_t *val);
375 int mec_hal_gpio_parout_port_get_by_pin(uint32_t pin, uint32_t *val);
Dmec_acpi_ec_api.h57 void mec_hal_acpi_ec_status_wr(struct mec_acpi_ec_regs *regs, uint8_t val);
58 void mec_hal_acpi_ec_status_set(struct mec_acpi_ec_regs *regs, uint8_t val);
59 void mec_hal_acpi_ec_status_mask(struct mec_acpi_ec_regs *regs, uint8_t val, uint8_t msk);
Dmec_acpi_ec.c284 void mec_hal_acpi_ec_status_wr(struct mec_acpi_ec_regs *regs, uint8_t val) in mec_hal_acpi_ec_status_wr() argument
291 regs->AEC_STATUS = val; in mec_hal_acpi_ec_status_wr()
294 void mec_hal_acpi_ec_status_set(struct mec_acpi_ec_regs *regs, uint8_t val) in mec_hal_acpi_ec_status_set() argument
301 regs->AEC_STATUS |= val; in mec_hal_acpi_ec_status_set()
304 void mec_hal_acpi_ec_status_mask(struct mec_acpi_ec_regs *regs, uint8_t val, uint8_t msk) in mec_hal_acpi_ec_status_mask() argument
311 regs->AEC_STATUS = (regs->AEC_STATUS & ~msk) | (val & msk); in mec_hal_acpi_ec_status_mask()
Dmec_i3c.c584 uint32_t val = 0; in MEC_HAL_I3C_TGT_DEFTGTS_DAT_write() local
591 val = DEV_ADDR_TABLE1_LOC1_DYNAMIC_ADDR(sdct_info.dynamic_addr); in MEC_HAL_I3C_TGT_DEFTGTS_DAT_write()
594 val |= DEV_ADDR_TABLE1_LOC1_STATIC_ADDR(sdct_info.static_addr); in MEC_HAL_I3C_TGT_DEFTGTS_DAT_write()
597 _i3c_DAT_write(regs, DAT_start, i, val); in MEC_HAL_I3C_TGT_DEFTGTS_DAT_write()
630 uint32_t val; in MEC_HAL_I3C_DAT_DynamicAddr_write() local
632 val = DEV_ADDR_TABLE1_LOC1_DYNAMIC_ADDR(address); in MEC_HAL_I3C_DAT_DynamicAddr_write()
634 _i3c_DAT_write(regs, DAT_start, (uint8_t)DAT_idx, val); in MEC_HAL_I3C_DAT_DynamicAddr_write()
649 uint32_t val; in MEC_HAL_I3C_DAT_DynamicAddrAssign_write() local
651 val = DEV_ADDR_TABLE1_LOC1_DYNAMIC_ADDR(address); in MEC_HAL_I3C_DAT_DynamicAddrAssign_write()
655 val |= DEV_ADDR_TABLE1_LOC1_PARITY; in MEC_HAL_I3C_DAT_DynamicAddrAssign_write()
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Dmec_emi.c190 int mec_hal_emi_mbox_wr(struct mec_emi_regs *regs, uint8_t host_to_ec, uint8_t val) in mec_hal_emi_mbox_wr() argument
197 regs->H2EMB = val; in mec_hal_emi_mbox_wr()
199 regs->E2HMB = val; in mec_hal_emi_mbox_wr()
Dmec_kscan_api.h113 void mec_hal_kscan_kso_select(struct mec_kscan_regs *regs, uint8_t kso_sel, uint8_t val) in mec_hal_kscan_kso_select() argument
115 uint8_t ksoinv = (val) ? MEC_BIT(MEC_KSCAN_KSO_SEL_KSO_INVERT_Pos) : 0; in mec_hal_kscan_kso_select()
Dmec_defs.h74 #define MEC_FIELD_VAL(val, pos) ((uint32_t)(val) << (pos)) argument
Dmec_mailbox.c129 int mec_hal_mbox_sirq_en_mask(struct mec_mbox_regs *base, uint8_t val, uint8_t mask) in mec_hal_mbox_sirq_en_mask() argument
136 base->ECSMIM = (base->ECSMIM & ~mask) | (val & mask); in mec_hal_mbox_sirq_en_mask()
Dmec_pcr_api.h169 int mec_hal_pcr_slp_en_set(uint8_t regid, uint32_t val);
170 int mec_hal_pcr_slp_en_mask(uint8_t regid, uint32_t val, uint32_t mask);
/hal_microchip-latest/mec/common/
Dmec_cpu.h192 static __always_inline void write_read_back8(volatile uint8_t* addr, uint8_t val)
199 : "r" (addr), "r" (val)
204 static __always_inline void write_read_back16(volatile uint16_t* addr, uint16_t val)
211 : "r" (addr), "r" (val)
216 static __always_inline void write_read_back32(volatile uint32_t* addr, uint32_t val)
223 : "r" (addr), "r" (val)
/hal_microchip-latest/mpfs/mpfs_hal/common/
Dbits.h48 #define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1))) argument
49 #define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)… argument
Datomic.h40 #define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val) argument
/hal_microchip-latest/mpfs/drivers/mss/mss_mmc/
Dmss_mmc_regs.h606 static inline uint32_t SRS17_GET_CLOCK_MULTIPLIER(const uint32_t val) in SRS17_GET_CLOCK_MULTIPLIER() argument
608 return ((val & 0x00FF0000u) >> 16u); in SRS17_GET_CLOCK_MULTIPLIER()
620 static inline uint32_t SRS17_GET_RETUNING_TIMER_COUNT(const uint32_t val) in SRS17_GET_RETUNING_TIMER_COUNT() argument
625 uint32_t shift = ((val & 0x00000F00u) >> 8u); in SRS17_GET_RETUNING_TIMER_COUNT()
818 static inline uint8_t SDCARD_SWITCH_FUNC_IS_FUNC_SUPPORTED(const uint8_t* val, uint8_t groupNum, ui… in SDCARD_SWITCH_FUNC_IS_FUNC_SUPPORTED() argument
825 supportStatus = (((uint32_t)GET_BYTE_FROM_BUFFER2(val, 64u, 50u - offset) in SDCARD_SWITCH_FUNC_IS_FUNC_SUPPORTED()
826 | (uint32_t)(GET_BYTE_FROM_BUFFER2(val, 64u, 51u - offset))) << 8) in SDCARD_SWITCH_FUNC_IS_FUNC_SUPPORTED()
833 static inline uint8_t SDCARD_SWICH_FUNC_GET_STAT_CODE(const uint8_t* val, uint8_t groupNum) in SDCARD_SWICH_FUNC_GET_STAT_CODE() argument
840 result = (GET_BYTE_FROM_BUFFER2(val, 64u, offset) >> shift) & 0xFu; in SDCARD_SWICH_FUNC_GET_STAT_CODE()
846 static inline uint8_t SDCARD_SWICH_FUNC_GET_BUSY_STAT(const uint8_t* val, uint8_t groupNum, uint8_t… in SDCARD_SWICH_FUNC_GET_BUSY_STAT() argument
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/hal_microchip-latest/pic32c/pic32cxsg/include/fixups/
Dadc_fixup_pic32cxsg.h79 #define ADC_SAM0_CALIB(prefix, val) \ argument
80 UTIL_CAT(ADC_CALIB_, val)( \
81 (((*(uint32_t *)UTIL_CAT(UTIL_CAT(UTIL_CAT(prefix, FUSES_), val), _ADDR)) \
82 >> UTIL_CAT(UTIL_CAT(UTIL_CAT(prefix, FUSES_), val), _Pos)) \
83 & UTIL_CAT(UTIL_CAT(UTIL_CAT(prefix, FUSES_), val), _Msk)) \
/hal_microchip-latest/mec/mec1501/component/
Despi_vw.h347 #define MEC_MSVW_SRC_VAL(src, val) ((uint32_t)(val & 0x01u) << ((src) << 3)) argument
591 inline void mec_espi_msvw_set_all(ESPI_MSVW_REG * p, uint32_t val) in mec_espi_msvw_set_all() argument
593 p->SRC = val; in mec_espi_msvw_set_all()

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