Lines Matching refs:val
426 uint32_t mec_hal_gpio_set_ctrl_property(uint32_t ctrl, uint8_t prop_id, uint8_t val) in mec_hal_gpio_set_ctrl_property() argument
435 ctrl = (ctrl & ~(msk0 << bpos)) | (((uint32_t)val & msk0) << bpos); in mec_hal_gpio_set_ctrl_property()
465 int mec_hal_gpio_set_property(uint32_t pin, uint8_t prop_id, uint8_t val) in mec_hal_gpio_set_property() argument
486 | (((uint32_t)val & msk0) << bpos)); in mec_hal_gpio_set_property()
522 uint32_t val = gprops[n].val & mask; in mec_hal_gpio_set_props() local
525 ctrl2 = (ctrl2 & ~(mask << bitpos)) | (val << bitpos); in mec_hal_gpio_set_props()
527 ctrl = (ctrl & ~(mask << bitpos)) | (val << bitpos); in mec_hal_gpio_set_props()
539 uint32_t val = MEC_GPIO_CTRL_PUD_NONE; in pull_config() local
543 val = MEC_GPIO_CTRL_PUD_PULLUP; in pull_config()
546 val = MEC_GPIO_CTRL_PUD_PULLDN; in pull_config()
549 val = MEC_GPIO_CTRL_PUD_REPEATER; in pull_config()
555 return (val << MEC_GPIO_CTRL_PUD_Pos); in pull_config()
560 uint32_t val = MEC_GPIO_CTRL_PGS_VTR; in pwrgate_config() local
564 val = MEC_GPIO_CTRL_PGS_VCC; in pwrgate_config()
567 val = MEC_GPIO_CTRL_PGS_UNPWRD; in pwrgate_config()
573 return (val << MEC_GPIO_CTRL_PGS_Pos); in pwrgate_config()
578 uint32_t val = MEC_GPIO_CTRL_IDET_DIS; in idet_config() local
582 val = MEC_GPIO_CTRL_IDET_LVL_LO; in idet_config()
585 val = MEC_GPIO_CTRL_IDET_LVL_HI; in idet_config()
588 val = MEC_GPIO_CTRL_IDET_REDGE; in idet_config()
591 val = MEC_GPIO_CTRL_IDET_FEDGE; in idet_config()
594 val = MEC_GPIO_CTRL_IDET_BEDGE; in idet_config()
600 return (val << MEC_GPIO_CTRL_IDET_Pos); in idet_config()
721 int mec_hal_gpio_set_ctrl_mask(uint32_t pin, uint32_t val, uint32_t mask) in mec_hal_gpio_set_ctrl_mask() argument
728 MEC_GPIO->CTRL[pin] = (MEC_GPIO->CTRL[pin] & ~mask) | (val & mask); in mec_hal_gpio_set_ctrl_mask()
763 int mec_hal_gpio_ctrl2_mask(const uint32_t pin, uint32_t val, uint32_t mask) in mec_hal_gpio_ctrl2_mask() argument
770 MEC_GPIO->CTL2[pin] = (MEC_GPIO->CTL2[pin] & ~mask) | (val & mask); in mec_hal_gpio_ctrl2_mask()
788 uint32_t val = 0; in mec_hal_gpio_set_slew_rate() local
798 val = MEC_GPIO_CTL2_SLR_SLOW; in mec_hal_gpio_set_slew_rate()
801 val = MEC_GPIO_CTL2_SLR_FAST; in mec_hal_gpio_set_slew_rate()
808 | (val << MEC_GPIO_CTL2_SLR_Pos)); in mec_hal_gpio_set_slew_rate()
826 uint32_t val = 0; in mec_hal_gpio_set_drive_strength() local
836 val = MEC_GPIO_CTL2_DRVSTR_2MA; in mec_hal_gpio_set_drive_strength()
839 val = MEC_GPIO_CTL2_DRVSTR_4MA; in mec_hal_gpio_set_drive_strength()
842 val = MEC_GPIO_CTL2_DRVSTR_8MA; in mec_hal_gpio_set_drive_strength()
845 val = MEC_GPIO_CTL2_DRVSTR_12MA; in mec_hal_gpio_set_drive_strength()
852 | (val << MEC_GPIO_CTL2_DRVSTR_Pos)); in mec_hal_gpio_set_drive_strength()
857 int mec_hal_gpio_alt_out(const uint32_t pin, uint8_t val) in mec_hal_gpio_alt_out() argument
865 if (val) { in mec_hal_gpio_alt_out()
949 int mec_hal_gpio_parin_port(const uint8_t port, uint32_t *val) in mec_hal_gpio_parin_port() argument
951 if ((port >= MEC_GPIO_PORT_MAX) || !val) { in mec_hal_gpio_parin_port()
955 *val = MEC_GPIO->PARIN[port]; in mec_hal_gpio_parin_port()
960 int mec_hal_gpio_parin_by_pin(uint32_t pin, uint32_t *val) in mec_hal_gpio_parin_by_pin() argument
967 if (!val) { in mec_hal_gpio_parin_by_pin()
973 *val = MEC_GPIO->PARIN[port]; in mec_hal_gpio_parin_by_pin()
978 int mec_hal_gpio_parout_port_get(const uint8_t port, uint32_t *val) in mec_hal_gpio_parout_port_get() argument
980 if ((port >= MEC_GPIO_PORT_MAX) || !val) { in mec_hal_gpio_parout_port_get()
984 *val = MEC_GPIO->PAROUT[port]; in mec_hal_gpio_parout_port_get()
989 int mec_hal_gpio_parout_port_get_by_pin(uint32_t pin, uint32_t *val) in mec_hal_gpio_parout_port_get_by_pin() argument
996 if (!val) { in mec_hal_gpio_parout_port_get_by_pin()
1002 *val = MEC_GPIO->PAROUT[port]; in mec_hal_gpio_parout_port_get_by_pin()