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/hal_microchip-2.7.6/mec/mec1501/component/
Dadc.h96 #define MCHP_ADC_STATUS_CHAN(n) BIT(n) argument
102 #define MCHP_ADC_SCS_CH(n) BIT((n) & 0x07) argument
108 #define MCHP_ADC_RCS_CH(n) BIT((n) & 0x07) argument
134 #define MCHP_ADC_CH_VREF_SEL_MASK(n) (0x03u << (((n) & 0x07) << 1)) argument
135 #define MCHP_ADC_CH_VREF_SEL_PAD(n) 0u argument
136 #define MCHP_ADC_CH_VREF_SEL_GPIO(n) (0x01u << (((n) & 0x07) << 1)) argument
178 #define MCHP_ADC_CH_NUM(n) ((n) & MCHP_ADC_MAX_CHAN_MASK) argument
179 #define MCHP_ADC_CH_OFS(n) (MCHP_ADC_CH_NUM(n) << 2) argument
180 #define MCHP_ADC_CH_ADDR(n) (MCHP_ADC_BASE_ADDR + MCHP_ADC_CH_OFS(n)) argument
182 #define MCHP_ADC_RD_CHAN(n) REG32(MCHP_ADC_CH_ADDR(n)) argument
Decia.h67 #define MCHP_NVIC_SET_EN(n) \ argument
68 REG32(MCHP_NVIC_SET_EN_BASE + ((uintptr_t)(n) * 4u))
70 #define MCHP_NVIC_CLR_EN(n) \ argument
71 REG32(MCHP_NVIC_CLR_EN_BASE + ((uintptr_t)(n) * 4u))
73 #define MCHP_NVIC_SET_PEND(n) \ argument
74 REG32(MCHP_NVIC_SET_PEND_BASE + ((uintptr_t)(n) * 4u))
76 #define MCHP_NVIC_CLR_PEND(n) \ argument
77 REG32(MCHP_NVIC_CLR_PEND_BASE + ((uintptr_t)(n) * 4u))
144 #define MCHP_GIRQ_TO_AGGR_NVIC(n) (((n) < 23) ? ((n)-8) : ((n)-9)) argument
147 #define MCHP_GIRQ_SRC_ADDR(n) \ argument
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Dpwm.h51 #define MCHP_PWM_ADDR(n) (MCHP_PWM_BASE_ADDR + \ argument
52 ((n) << MCHP_PWM_INST_SPACING_P2))
102 #define MCHP_PWM_CFG_CLK_PRE_DIV(n) ( \ argument
103 ((n) & MCHP_PWM_CFG_CLK_PRE_DIV_MASK0) \
114 #define MCHP_PWM_COUNT_ON(n) \ argument
115 REG16(MCHP_PWM_ADDR(n) + MCHP_PWM_COUNT_ON_REG_OFS)
117 #define MCHP_PWM_COUNT_OFF(n) \ argument
118 REG16(MCHP_PWM_ADDR(n) + MCHP_PWM_COUNT_OFF_REG_OFS)
120 #define MCHP_PWM_CONFIG(n) \ argument
121 REG8(MCHP_PWM_ADDR(n) + MCHP_PWM_CONFIG_REG_OFS)
Dacpi_ec.h57 #define MCHP_ACPI_EC_ADDR(n) (MCHP_ACPI_EC_BASE_ADDR +\ argument
58 ((uint32_t)(n) << MCHP_ACPI_EC_SPACING_PWROF2))
95 #define MCHP_ACPI_EC_IBF_NVIC(n) (45u + ((uint32_t)(n) << 1)) argument
96 #define MCHP_ACPI_EC_OBE_NVIC(n) (46u + ((uint32_t)(n) << 1)) argument
97 #define MCHP_ACPI_EC_IBF_GIRQ_POS(n) (5u + ((uint32_t)(n) << 1)) argument
98 #define MCHP_ACPI_EC_OBE_GIRQ_POS(n) (6u + ((uint32_t)(n) << 1)) argument
99 #define MCHP_ACPI_EC_IBF_GIRQ(n) (1u << MCHP_ACPI_EC_IBF_GIRQ_POS(n)) argument
100 #define MCHP_ACPI_EC_OBE_GIRQ(n) (1u << MCHP_ACPI_EC_OBE_GIRQ_POS(n)) argument
Dpcr.h93 #define MCHP_PCR_SLP_EN_ADDR(n) \ argument
94 (MCHP_PCR_BASE_ADDR + 0x30u + ((uint32_t)(n) << 2))
95 #define MCHP_PCR_CLK_REQ_ADDR(n) \ argument
96 (MCHP_PCR_BASE_ADDR + 0x50u + ((uint32_t)(n) << 2))
97 #define MCHP_PCR_PERIPH_RESET_ADDR(n) \ argument
98 (MCHP_PCR_BASE_ADDR + 0x70u + ((uint32_t)(n) << 2))
339 #define MCHP_PCR_SLP_EN(n) REG32(MCHP_PCR_SLP_EN_ADDR(n)) argument
340 #define MCHP_PCR_CLK_REQ_RO(n) REG32(MCHP_PCR_CLK_REQ_ADDR(n)) argument
351 #define MCHP_PCR_PERIPH_RST(n) REG32(MCHP_PCR_PERIPH_RESET_ADDR(n)) argument
353 #define MCHP_PCR_DEV_SLP_EN_CLR(n, b) \ argument
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Despi_vw.h68 #define ESPI_M2SW1_SRC_SEL_POS(n) ((n) << 3) argument
69 #define ESPI_M2SW1_SRC_SEL_MASK(n) ((0x0fu) << (ESPI_M2SW1_SRC_SEL_POS(n))) argument
70 #define ESPI_M2SW1_SRC_SEL_VAL(n, v) (((uint32_t)(v) & 0x0fu) << (ESPI_M2SW1_SRC_SEL_POS(n))) argument
83 #define ESPI_M2SW2_SRC_POS(n) ((n) << 3) argument
84 #define ESPI_M2SW2_SRC_MASK(n) ((ESPI_M2SW2_SRC_MASK0) << (ESPI_M2SW2_SRC_POS(n))) argument
85 #define ESPI_M2SW2_SRC_VAL(n, v) (((uint32_t)(v) & 0x0fu) << (ESPI_M2SW2_SRC_POS(n))) argument
135 #define ESPI_S2MW1_CHG_POS(n) ((n) + 16u) argument
136 #define ESPI_S2MW1_CHG(v, n) (((uint32_t)(v) >> ESPI_S2MW1_CHG_POS(n)) & 0x01) argument
149 #define ESPI_S2MW1_SRC_POS(n) ((n) << 3) argument
150 #define ESPI_S2MW1_SRC(v, n) (((uint32_t)(v) & 0x01) << (ESPI_S2MW1_SRC_POS(n))) argument
Dqmspi.h103 #define MCHP_QMSPI_DESCR_OFS(n) (0x30u + ((uint32_t)(n) * 4U)) argument
118 #define MCHP_QMSPI_DESCR_ADDR(n) \ argument
119 (MCHP_QMSPI_BASE_ADDR + (0x30 + (((uint32_t)(n) & 0x0fu) << 2)))
158 #define MCHP_QMSPI_M_CS(n) \ argument
159 (((uint32_t)(n) & MCHP_QMSPI_M_CS_MASK0) << MCHP_QMSPI_M_CS_POS)
209 #define MCHP_QMSPI_C_DESCR(n) (((uint32_t)(n) & \ argument
213 #define MCHP_QMSPI_C_NEXT_DESCR(n) (((uint32_t)(n) & \ argument
227 #define MCHP_QMSPI_C_XFR_NUNITS(n) ((uint32_t)(n) << \ argument
229 #define MCHP_QMSPI_C_XFR_NUNITS_GET(n) (((uint32_t)(n) >> \ argument
Dtimer.h57 #define MCHP_B16TMR_ADDR(n) \ argument
58 (MCHP_B16TMR_BASE + ((uint32_t)(n) << MCHP_BTMR_INSTANCE_POS))
64 #define MCHP_B32TMR_ADDR(n) \ argument
65 (MCHP_B32TMR_BASE + ((uint32_t)(n) << MCHP_BTMR_INSTANCE_POS))
185 #define MCHP_HTMR_ADDR(n) \ argument
186 (MCHP_HTMR_BASE_ADDR + ((uint32_t)(n) << MCHP_HTMR_SPACING_PWROF2))
Dled.h145 #define MCHP_LED_ADDR(n) \ argument
146 (MCHP_LED_BASE_ADDR + ((uint32_t)(n) << MCHP_LED_SPACING_PWROF2))
Dtach.h51 #define MCHP_TACH_ADDR(n) (MCHP_TACH_BASE_ADDR + \ argument
52 ((n) << MCHP_TACH_INST_SPACING_P2))
Dgpio.h60 #define MCHP_GPIO_CTRL_ADDR(n) \ argument
61 ((uintptr_t)(MCHP_GPIO_CTRL_BASE) + ((uintptr_t)(n) << 2))
63 #define MCHP_GPIO_CTRL2_ADDR(n) \ argument
65 ((uintptr_t)(n) << 2))
77 #define MCHP_GPIO_PARIN_ADDR(n) ((uintptr_t)(MCHP_GPIO_BASE_ADDR) +\ argument
78 (uintptr_t)(MCHP_GPIO_PARIN_OFS) + ((n) << 2))
108 #define MCHP_GPIO_PAROUT_ADDR(n) ((uintptr_t)(MCHP_GPIO_BASE_ADDR) +\ argument
109 (uintptr_t)(MCHP_GPIO_PAROUT_OFS) + ((n) << 2))
Duart.h56 #define MCHP_UART_BASE_ADDR(n) \ argument
57 (MCHP_UART0_BASE_ADDRESS + ((uint32_t)(n) << 10u))
Di2c.h50 #define MCHP_I2C_BASE_ADDR(n) \ argument
51 ((MCHP_I2C0_BASE_ADDR) + (n) << (MCHP_I2C_INST_SPACING_P2))
Dsmb.h52 #define MCHP_I2C_SMB_BASE_ADDR(n) \ argument
54 ((uint32_t)(n) << (MCHP_I2C_SMB_INST_SPACING_P2)))
Ddma.h50 #define MCHP_DMA_CHAN_ADDR(n) ((uintptr_t)(MCHP_DMA_CHAN0_ADDR) +\ argument
51 ((uintptr_t)(n) << MCHP_DMA_OFFSET_POF2))
/hal_microchip-2.7.6/mec/mec1501/
DMEC1501hsz.h318 #define DMA_CHAN_BASE(n) (DMA_BASE + (((n)+1)<<6)) argument
333 #define SMB_BASE(n) (PERIPH_BASE + 0x4000u + ((n)<<10)) argument
339 #define I2C_BASE(n) (PERIPH_BASE + 0x5100u + ((n)<<8)) argument
343 #define PWM_BASE(n) (PERIPH_BASE + 0x5800u + ((n)<<4)) argument
353 #define TACH_BASE(n) (PERIPH_BASE + 0x6000u + ((n)<<4)) argument
389 #define ACPI_EC_BASE(n) (PERIPH_BASE + 0xf0800u + ((n)<<10)) argument
396 #define UART_BASE(n) (PERIPH_BASE + 0xf2400u + ((n)<<10)) argument
/hal_microchip-2.7.6/mec/common/
Dmec_defs.h37 #define BIT(n) (1ul << (n)) argument
41 #define SHLU32(v, n) ((unsigned long)(v) << (n)) argument