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Searched refs:CPUSS_IPC_IPC_IRQ_NR (Results 1 – 13 of 13) sorted by relevance

/hal_infineon-latest/mtb-hal-cat1/include_pvt/
Dcyhal_ipc_impl.h165 #ifdef CPUSS_IPC_IPC_IRQ_NR
166 #define _CYHAL_IPC_RELEASE_INTR_BITS (CPUSS_IPC_IPC_IRQ_NR)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h2109 #define CY_IPC_INTERRUPTS CPUSS_IPC_IPC_IRQ_NR
2110 #define CY_IPC_INTERRUPTS_PER_INSTANCE CPUSS_IPC_IPC_IRQ_NR
2112 #define CY_IPC_IP0_INT CPUSS_IPC_IPC_IRQ_NR
Dxmc7100_config.h2285 #define CPUSS_IPC_IPC_IRQ_NR 8u macro
Dtviic2d6m_config.h2435 #define CPUSS_IPC_IPC_IRQ_NR 8u macro
Dxmc7200_config.h2870 #define CPUSS_IPC_IPC_IRQ_NR 8u macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_01_config.h1799 #define CPUSS_IPC_IPC_IRQ_NR 16u macro
Dpsoc6_03_config.h1525 #define CPUSS_IPC_IPC_IRQ_NR 16u macro
Dpsoc6_04_config.h1493 #define CPUSS_IPC_IPC_IRQ_NR 16u macro
Dpsoc6_02_config.h2000 #define CPUSS_IPC_IPC_IRQ_NR 16u macro
Dfx3g2_config.h2163 #define CPUSS_IPC_IPC_IRQ_NR 16u macro
Dtviibe1m_config.h1974 #define CPUSS_IPC_IPC_IRQ_NR 8u macro
Dtviibe2m_config.h2133 #define CPUSS_IPC_IPC_IRQ_NR 8u macro
Dtviibe4m_config.h2138 #define CPUSS_IPC_IPC_IRQ_NR 8u macro