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Searched refs:val (Results 1 – 25 of 68) sorted by relevance

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/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_can.c252 uint32_t val = 0U; in can_filter_init() local
254 val = ((uint32_t)1) << (can_filter_parameter_init->filter_number); in can_filter_init()
258 CAN_FW(CAN0) &= ~(uint32_t)val; in can_filter_init()
263 CAN_FSCFG(CAN0) &= ~(uint32_t)val; in can_filter_init()
276 CAN_FSCFG(CAN0) |= (uint32_t)val; in can_filter_init()
290 CAN_FMCFG(CAN0) &= ~(uint32_t)val; in can_filter_init()
293 CAN_FMCFG(CAN0) |= (uint32_t)val; in can_filter_init()
299 CAN_FAFIFO(CAN0) &= ~(uint32_t)val; in can_filter_init()
302 CAN_FAFIFO(CAN0) |= (uint32_t)val; in can_filter_init()
308 CAN_FW(CAN0) |= (uint32_t)val; in can_filter_init()
[all …]
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_can.c251 uint32_t val = 0U; in can_filter_init() local
253 val = ((uint32_t)1) << (can_filter_parameter_init->filter_number); in can_filter_init()
257 CAN_FW(CAN0) &= ~(uint32_t)val; in can_filter_init()
262 CAN_FSCFG(CAN0) &= ~(uint32_t)val; in can_filter_init()
275 CAN_FSCFG(CAN0) |= (uint32_t)val; in can_filter_init()
289 CAN_FMCFG(CAN0) &= ~(uint32_t)val; in can_filter_init()
292 CAN_FMCFG(CAN0) |= (uint32_t)val; in can_filter_init()
298 CAN_FAFIFO(CAN0) &= ~(uint32_t)val; in can_filter_init()
301 CAN_FAFIFO(CAN0) |= (uint32_t)val; in can_filter_init()
307 CAN_FW(CAN0) |= (uint32_t)val; in can_filter_init()
[all …]
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_can.c251 uint32_t val = 0U; in can_filter_init() local
253 val = ((uint32_t)1) << (can_filter_parameter_init->filter_number); in can_filter_init()
257 CAN_FW(CAN0) &= ~(uint32_t)val; in can_filter_init()
262 CAN_FSCFG(CAN0) &= ~(uint32_t)val; in can_filter_init()
275 CAN_FSCFG(CAN0) |= (uint32_t)val; in can_filter_init()
289 CAN_FMCFG(CAN0) &= ~(uint32_t)val; in can_filter_init()
292 CAN_FMCFG(CAN0) |= (uint32_t)val; in can_filter_init()
298 CAN_FAFIFO(CAN0) &= ~(uint32_t)val; in can_filter_init()
301 CAN_FAFIFO(CAN0) |= (uint32_t)val; in can_filter_init()
307 CAN_FW(CAN0) |= (uint32_t)val; in can_filter_init()
[all …]
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_rcu.h448 #define RCU_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
1004 #define CHECK_PLL_PSC_VALID(val) (((val) >= RCU_PLLPSC_DIV_MIN)&&((val) <= RCU_PLLPSC_DIV_MA… argument
1005 #define CHECK_PLL_N_VALID(val, inc) (((val) >= (RCU_PLLN_MUL_MIN + (inc)))&&((val) <= RCU_PLLN_… argument
1006 #define CHECK_PLL_P_VALID(val) (((val) == 2U) || ((val) == 4U) || ((val) == 6U) || ((val) … argument
1007 #define CHECK_PLL_Q_VALID(val) (((val) >= RCU_PLLQ_DIV_MIN)&&((val) <= RCU_PLLQ_DIV_MAX)) … argument
1051 #define CHECK_PLLI2S_PSC_VALID(val) (((val) >= RCU_PLLI2SPSC_DIV_MIN)&&((val) <= RCU_PLLI2SPSC_… argument
1052 #define CHECK_PLLI2S_N_VALID(val) (((val) >= RCU_PLLI2SN_MUL_MIN)&&((val) <= RCU_PLLI2SN_MUL_… argument
1053 #define CHECK_PLLI2S_Q_VALID(val) (((val) >= RCU_PLLI2SQ_DIV_MIN)&&((val) <= RCU_PLLI2SQ_DIV_… argument
1054 #define CHECK_PLLI2S_R_VALID(val) (((val) >= RCU_PLLI2SR_DIV_MIN)&&((val) <= RCU_PLLI2SR_DIV_… argument
1056 #define CHECK_PLLSAI_N_VALID(val) (((val) >= (RCU_PLLSAIN_MUL_MIN))&&((val) <= RCU_PLLSAIN_MU… argument
[all …]
Dgd32f4xx_dbg.h96 #define DBG_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
/hal_gigadevice-latest/gd32vf103/riscv/drivers/
Driscv_bits.h15 #define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1))) argument
16 #define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)… argument
Driscv_encoding.h183 #define write_fpu(reg, val) ({ \ argument
184 if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
185 __asm__ volatile ("fmv.w.x " #reg ", %0" :: "i"(val)); \
187 __asm__ volatile ("fmv.w.x " #reg ", %0" :: "r"(val)); })
194 #define write_csr(reg, val) ({ \ argument
195 if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
196 __asm__ volatile ("csrw " #reg ", %0" :: "i"(val)); \
198 __asm__ volatile ("csrw " #reg ", %0" :: "r"(val)); })
200 #define swap_csr(reg, val) ({ unsigned long __tmp; \ argument
201 if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
[all …]
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_can.c704 uint32_t val = 0U; in can_rx_fifo_filter_table_config() local
715 val = 0U; in can_rx_fifo_filter_table_config()
718 val |= CAN_FDESX_RTR_A; in can_rx_fifo_filter_table_config()
721 val |= CAN_FDESX_IDE_A; in can_rx_fifo_filter_table_config()
722 val |= (uint32_t)FIFO_FILTER_ID_EXD_A(id_filter_table[i].id); in can_rx_fifo_filter_table_config()
724 val |= (uint32_t)FIFO_FILTER_ID_STD_A(id_filter_table[i].id); in can_rx_fifo_filter_table_config()
726 filter_table[i] = val; in can_rx_fifo_filter_table_config()
733 val = 0U; in can_rx_fifo_filter_table_config()
736 val |= CAN_FDESX_RTR_B0; in can_rx_fifo_filter_table_config()
739 val |= CAN_FDESX_IDE_B0; in can_rx_fifo_filter_table_config()
[all …]
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_can.h539 #define CAN_BIT_POS(val) ((uint32_t)(val) & 0x0000001FU) argument
1120 #define FIFO_FILTER_ID_EXD_A(val) (((uint32_t)(val) << 0U) & CAN_FDESX_ID_EXD_A) /*!< va… argument
1121 #define FIFO_FILTER_ID_STD_A(val) (((uint32_t)(val) << 18U) & CAN_FDESX_ID_STD_A)/*!< va… argument
1122 #define FIFO_FILTER_ID_EXD_B0(val) (GET_BITS((val),15,28) << 16U) /*!< va… argument
1123 #define FIFO_FILTER_ID_EXD_B1(val) (GET_BITS((val),15,28) << 0U) /*!< va… argument
1124 #define FIFO_FILTER_ID_STD_B0(val) (GET_BITS((val),0,10) << 19U) /*!< va… argument
1125 #define FIFO_FILTER_ID_STD_B1(val) (GET_BITS((val),0,10) << 3U) /*!< va… argument
1126 #define FIFO_FILTER_ID_EXD_C0(val) (GET_BITS((val),21,28) << 24U) /*!< va… argument
1127 #define FIFO_FILTER_ID_EXD_C1(val) (GET_BITS((val),21,28) << 16U) /*!< va… argument
1128 #define FIFO_FILTER_ID_EXD_C2(val) (GET_BITS((val),21,28) << 8U) /*!< va… argument
[all …]
Dgd32a50x_dbg.h79 #define DBG_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_can.c418 uint32_t val = 0U; in can_filter_init() local
420 val = ((uint32_t)1) << (can_filter_parameter_init->filter_number); in can_filter_init()
424 CAN_FW(can_periph) &= ~(uint32_t)val; in can_filter_init()
429 CAN_FSCFG(can_periph) &= ~(uint32_t)val; in can_filter_init()
442 CAN_FSCFG(can_periph) |= (uint32_t)val; in can_filter_init()
456 CAN_FMCFG(can_periph) &= ~(uint32_t)val; in can_filter_init()
459 CAN_FMCFG(can_periph) |= (uint32_t)val; in can_filter_init()
465 CAN_FAFIFO(can_periph) &= ~(uint32_t)val; in can_filter_init()
468 CAN_FAFIFO(can_periph) |= (uint32_t)val; in can_filter_init()
474 CAN_FW(can_periph) |= (uint32_t)val; in can_filter_init()
[all …]
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_fmc.h115 #define FMC_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
118 #define FMC_BIT_POS0(val) (((uint32_t)(val) >> 6) & 0x1FU) argument
119 #define FMC_BIT_POS1(val) ((uint32_t)(val) & 0x1FU) argument
Dgd32vf103_i2c.h135 #define I2C_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
139 #define I2C_BIT_POS2(val) (((uint32_t)(val) & 0x1F0000U) >> 16) argument
Dgd32vf103_usart.h126 #define USART_BIT_POS(val) ((uint32_t)(val) & (0x0000001FU)) argument
130 #define USART_BIT_POS2(val) (((uint32_t)(val) & (0x001F0000U)) >> 16) argument
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_fmc.h141 #define FMC_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
144 #define FMC_BIT_POS0(val) (((uint32_t)(val) >> 6) & 0x1FU) argument
145 #define FMC_BIT_POS1(val) ((uint32_t)(val) & 0x1FU) argument
Dgd32f403_dbg.h87 #define DBG_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
Dgd32f403_i2c.h138 #define I2C_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
142 #define I2C_BIT_POS2(val) (((uint32_t)(val) & 0x1F0000U) >> 16) argument
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_slcd.c466 uint32_t val; in slcd_interrupt_flag_get() local
467 val = (SLCD_CFG & int_flag); in slcd_interrupt_flag_get()
468 if((RESET != (SLCD_STAT & int_flag)) && (RESET != val)) { in slcd_interrupt_flag_get()
Dgd32l23x_lptimer.c471 uint32_t val; in lptimer_interrupt_flag_get() local
472 val = (LPTIMER_INTEN & int_flag); in lptimer_interrupt_flag_get()
473 if((RESET != (LPTIMER_INTF & int_flag)) && (RESET != val)) { in lptimer_interrupt_flag_get()
/hal_gigadevice-latest/include/dt-bindings/pinctrl/
Dgd32-afio.h172 #define GD32_REMAP(reg, pos, msk, val) \ argument
176 (((val) & GD32_REMAP_VAL_MSK) << GD32_REMAP_VAL_POS))
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_dbg.h81 #define DBG_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument
Dgd32l23x_lpuart.h152 #define LPUART_BIT_POS(val) ((uint32_t)(val) & 0x0000001FU) argument
156 #define LPUART_BIT_POS2(val) (((uint32_t)(val) & 0x001F0000U) >> 16) argument
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dbg.h84 #define DBG_BIT_POS(val) ((uint32_t)(val) & 0x0000001FU) argument
Dgd32f3x0_i2c.h137 #define I2C_BIT_POS(val) ((uint32_t)(val) & 0x0000001FU) argument
141 #define I2C_BIT_POS2(val) (((uint32_t)(val) & 0x001F0000U) >> 16) argument
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_dbg.h95 #define DBG_BIT_POS(val) ((uint32_t)(val) & 0x1FU) argument

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