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Searched refs:DPORT_SET_PERI_REG_MASK (Results 1 – 25 of 30) sorted by relevance

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/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dclk_gate_ll.h159 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
166DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_disable_clk_set_rst()
171 DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); in periph_ll_wifi_bt_module_enable_clk()
181DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_reset()
193 DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_EN_M); in periph_ll_wifi_module_enable_clk_clear_rst()
200 DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); in periph_ll_wifi_module_disable_clk_set_rst()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dclk_gate_ll.h208 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
215DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_disable_clk_set_rst()
220 DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); in periph_ll_wifi_bt_module_enable_clk()
230DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_reset()
242 DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_EN_M); in periph_ll_wifi_module_enable_clk_clear_rst()
249 DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); in periph_ll_wifi_module_disable_clk_set_rst()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dclk_gate_ll.h234 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
241DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_disable_clk_set_rst()
246 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M); in periph_ll_wifi_bt_module_enable_clk()
256DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_reset()
268 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN_M); in periph_ll_wifi_module_enable_clk_clear_rst()
275 DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0); in periph_ll_wifi_module_disable_clk_set_rst()
Dmemprot_ll.h25 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_CLR); in memprot_ll_iram0_clear_intr()
37 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_IRAM0_4_REG, DPORT_PMS_PRO_IRAM0_ILG_EN); in memprot_ll_iram0_intr_ena()
147 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_IRAM0_1_REG, write_bit); in memprot_ll_iram0_sram_set_uni_block_perm()
153 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_IRAM0_1_REG, read_bit); in memprot_ll_iram0_sram_set_uni_block_perm()
159 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_IRAM0_1_REG, exec_bit); in memprot_ll_iram0_sram_set_uni_block_perm()
504 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_EN); in memprot_ll_dram0_intr_ena()
517 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_3_REG, DPORT_PMS_PRO_DRAM0_ILG_CLR); in memprot_ll_dram0_clear_intr()
625 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_1_REG, write_bit_offset); in memprot_ll_dram0_sram_set_uni_block_perm()
631 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DRAM0_1_REG, read_bit_offset); in memprot_ll_dram0_sram_set_uni_block_perm()
Dmemprot_peri_ll.h24 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DPORT_6_REG, DPORT_PMS_PRO_DPORT_ILG_CLR); in memprot_ll_peri1_clear_intr()
36 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_DPORT_6_REG, DPORT_PMS_PRO_DPORT_ILG_EN); in memprot_ll_peri1_intr_ena()
186 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_AHB_3_REG, DPORT_PMS_PRO_AHB_ILG_CLR); in memprot_ll_peri2_clear_intr()
198 DPORT_SET_PERI_REG_MASK(DPORT_PMS_PRO_AHB_3_REG, DPORT_PMS_PRO_AHB_ILG_EN); in memprot_ll_peri2_intr_ena()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dclk_gate_ll.h223 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
230DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_disable_clk_set_rst()
235 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M); in periph_ll_wifi_bt_module_enable_clk()
245DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_reset()
257 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN_M); in periph_ll_wifi_module_enable_clk_clear_rst()
264 DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0); in periph_ll_wifi_module_disable_clk_set_rst()
Dsdmmc_ll.h54 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_SDIO_HOST_EN); in sdmmc_ll_enable_bus_clock()
71 DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, DPORT_SDIO_HOST_RST); in sdmmc_ll_reset_register()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dclk_gate_ll.h255 DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); in periph_ll_enable_clk_clear_rst()
262DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_disable_clk_set_rst()
267 DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M); in periph_ll_wifi_bt_module_enable_clk()
277DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)… in periph_ll_reset()
289 DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_EN_M); in periph_ll_wifi_module_enable_clk_clear_rst()
296 DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0); in periph_ll_wifi_module_disable_clk_set_rst()
Dtrace_ll.h22 DPORT_SET_PERI_REG_MASK(SENSITIVE_INTERNAL_SRAM_USAGE_2_REG, block_bits); in trace_ll_set_mem_block()
/hal_espressif-latest/components/esp_system/port/soc/esp32s2/
Dclk.c295 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, common_perip_clk); in esp_perip_clk_init()
298 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN1_REG, common_perip_clk1); in esp_perip_clk_init()
302 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN1_REG, hwcrypto_perip_clk); in esp_perip_clk_init()
308 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN); in esp_perip_clk_init()
313 DPORT_SET_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_RTC_SLOW); in esp_perip_clk_init()
Dcache_err_int.c47 DPORT_SET_PERI_REG_MASK(EXTMEM_CACHE_DBG_INT_CLR_REG, in esp_cache_err_int_init()
56 DPORT_SET_PERI_REG_MASK(EXTMEM_CACHE_DBG_INT_ENA_REG, in esp_cache_err_int_init()
Dsystem_internal.c41 DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, in esp_system_reset_modules_on_exit()
48 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, in esp_system_reset_modules_on_exit()
/hal_espressif-latest/components/bootloader_support/src/
Dbootloader_random_esp32.c26 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_RNG_EN); in bootloader_random_enable()
42 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN); in bootloader_random_enable()
111 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST); in bootloader_random_disable()
Dbootloader_random_esp32s2.c29 DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_RNG_EN); in bootloader_random_enable()
/hal_espressif-latest/components/esp_system/port/soc/esp32/
Dcache_err_int.c51 DPORT_SET_PERI_REG_MASK(DPORT_CACHE_IA_INT_EN_REG, in esp_cache_err_int_init()
59 DPORT_SET_PERI_REG_MASK(DPORT_CACHE_IA_INT_EN_REG, in esp_cache_err_int_init()
Dclk.c290 DPORT_SET_PERI_REG_MASK(I2S_CLKM_CONF_REG(0), I2S_CLKA_ENA); in esp_perip_clk_init()
291 DPORT_SET_PERI_REG_MASK(I2S_CLKM_CONF_REG(1), I2S_CLKA_ENA); in esp_perip_clk_init()
295 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, common_perip_clk); in esp_perip_clk_init()
299 DPORT_SET_PERI_REG_MASK(DPORT_PERI_RST_EN_REG, hwcrypto_perip_clk); in esp_perip_clk_init()
Dsystem_internal.c39 DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, in esp_system_reset_modules_on_exit()
46 DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, in esp_system_reset_modules_on_exit()
/hal_espressif-latest/components/esp_psram/esp32s2/
Desp_psram_impl_quad.c537 DPORT_SET_PERI_REG_MASK(DPORT_PRO_CACHE_CTRL_REG, DPORT_PRO_DRAM_HL); in psram_cache_init()
538 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_HL); in psram_cache_init()
540 DPORT_SET_PERI_REG_MASK(DPORT_PRO_CACHE_CTRL_REG, DPORT_PRO_DRAM_SPLIT); in psram_cache_init()
541 DPORT_SET_PERI_REG_MASK(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_DRAM_SPLIT); in psram_cache_init()
/hal_espressif-latest/zephyr/port/boot/
Desp_image_loader.c210 DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN); in appcpu_start()
212 DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING); in appcpu_start()
/hal_espressif-latest/components/esp_system/port/
Dcpu_start.c237 DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN); in start_other_core()
239 DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING); in start_other_core()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Ddport_access.h93 #define DPORT_SET_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)|… macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Ddport_access.h90 #define DPORT_SET_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)|… macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Ddport_access.h92 #define DPORT_SET_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)|… macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Ddport_access.h93 #define DPORT_SET_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)|… macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Ddport_access.h93 #define DPORT_SET_PERI_REG_MASK(reg, mask) DPORT_WRITE_PERI_REG((reg), (DPORT_READ_PERI_REG(reg)|… macro

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