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Searched refs:clkctrl (Results 1 – 25 of 94) sorted by relevance

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/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SYS/
Dsys_me55.c87 MXC_MCR->clkctrl &= ~MXC_F_MCR_CLKCTRL_ERTCO_PD; in MXC_SYS_RTCClockEnable()
88 MXC_MCR->clkctrl |= MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
95 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
96 MXC_MCR->clkctrl &= ~MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
108 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
113 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
118 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ISO_EN; in MXC_SYS_ClockSourceEnable()
128 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
133 MXC_MCR->clkctrl &= ~MXC_F_MCR_CLKCTRL_ERTCO_PD; in MXC_SYS_ClockSourceEnable()
134 MXC_MCR->clkctrl |= MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
[all …]
Dsys_me13.c93 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
100 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
101 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
113 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
118 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
123 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ISO_EN; in MXC_SYS_ClockSourceEnable()
133 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
138 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
153 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
162 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_me16.c143 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
150 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
151 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
163 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
168 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
184 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
189 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
204 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
213 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
217 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_me12.c183 MXC_MCR->clkctrl |= MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
190 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
191 MXC_MCR->clkctrl &= ~MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
204 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
209 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
226 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
231 MXC_MCR->clkctrl &= ~MXC_F_MCR_CLKCTRL_ERTCO_PD; in MXC_SYS_ClockSourceEnable()
232 MXC_MCR->clkctrl |= MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
247 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
256 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_ai85.c198 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
205 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
206 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
218 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
223 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
228 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ISO_EN; in MXC_SYS_ClockSourceEnable()
245 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
251 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
266 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
275 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_ai87.c197 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
204 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
205 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
219 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
224 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
229 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ISO_EN; in MXC_SYS_ClockSourceEnable()
239 MXC_SETFIELD(MXC_GCR->clkctrl, MXC_F_GCR_CLKCTRL_SYSCLK_SEL, in MXC_SYS_ClockSourceEnable()
249 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_EBO_EN; in MXC_SYS_ClockSourceEnable()
254 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
276 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_me17.c194 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
201 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
202 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
228 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
233 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
264 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
269 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
284 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
293 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
297 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_me21.c192 MXC_MCR->clkctrl |= MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
193 MXC_MCR->clkctrl &= ~(MXC_F_MCR_CLKCTRL_ERTCO_PD); in MXC_SYS_RTCClockEnable()
200 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
201 MXC_MCR->clkctrl &= ~MXC_F_MCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
203 MXC_MCR->clkctrl |= MXC_F_MCR_CLKCTRL_ERTCO_PD; in MXC_SYS_RTCClockDisable()
217 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
222 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
239 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
259 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
268 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_me15.c194 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; // For Rev A parts in MXC_SYS_RTCClockEnable()
201 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
202 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
217 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
222 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
239 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
259 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
268 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
272 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceDisable()
290 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_me18.c213 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockEnable()
220 if ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) != MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO) { in MXC_SYS_RTCClockDisable()
221 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_RTCClockDisable()
233 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
238 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
243 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ISO_EN; in MXC_SYS_ClockSourceEnable()
259 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERFO_EN; in MXC_SYS_ClockSourceEnable()
264 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; in MXC_SYS_ClockSourceEnable()
279 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
288 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
[all …]
Dsys_es17.c96 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceEnable()
101 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceEnable()
121 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_ClockSourceDisable()
130 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_ClockSourceDisable()
134 MXC_GCR->clkctrl &= ~MXC_F_GCR_CLKCTRL_IBRO_EN; in MXC_SYS_ClockSourceDisable()
155 if (MXC_GCR->clkctrl & ready) { in MXC_SYS_Clock_Timeout()
170 current_clock = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL; in MXC_SYS_Clock_Select()
176 if (!(MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_EN)) { in MXC_SYS_Clock_Select()
177 MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_IPO_EN; in MXC_SYS_Clock_Select()
186 MXC_SETFIELD(MXC_GCR->clkctrl, MXC_F_GCR_CLKCTRL_SYSCLK_SEL, in MXC_SYS_Clock_Select()
[all …]
/hal_adi-latest/MAX/Source/MAX32655/
Dmax32xxx_system.c27 uint32_t psc = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV; in pre_init()
30 MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) | in pre_init()
38 MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) | (psc); in pre_init()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/PT/
Dpt_ai87.c36 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
40 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
44 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
48 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
52 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
56 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
60 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
64 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
68 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
Dpt_me13.c36 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
40 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
44 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
48 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
52 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
56 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
60 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
64 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
68 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
Dpt_ai85.c36 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
40 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
44 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
48 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
52 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
56 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
60 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
64 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
68 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
Dpt_me12.c38 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
42 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
46 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
50 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
54 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
58 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
62 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
66 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
70 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
Dpt_me17.c36 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
40 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
44 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
48 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
52 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
56 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
60 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
64 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
68 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
Dpt_me20.c36 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
40 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
44 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
48 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
52 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
56 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
60 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
64 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
68 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
Dpt_me55.c36 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
40 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
44 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
48 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
52 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
56 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
60 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
64 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
68 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
Dpt_me18.c36 MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
40 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV1; in MXC_PT_Init()
44 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV2; in MXC_PT_Init()
48 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV4; in MXC_PT_Init()
52 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV8; in MXC_PT_Init()
56 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV16; in MXC_PT_Init()
60 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV32; in MXC_PT_Init()
64 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV64; in MXC_PT_Init()
68 MXC_GCR->clkctrl |= MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; in MXC_PT_Init()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32655/Source/
Dsystem_max32655.c55 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
86 div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS; in SystemCoreClockUpdate()
101 uint32_t psc = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV; in PreInit()
104 MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) | in PreInit()
112 MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) | (psc); in PreInit()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32670/Source/
Dsystem_max32670.c55 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
83 base_freq = base_freq >> ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_DIV) >> in SystemCoreClockUpdate()
86 div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS; in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32662/Source/
Dsystem_max32662.c57 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
100 base_freq = base_freq >> ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_DIV) >> in SystemCoreClockUpdate()
104 div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS; in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32672/Source/
Dsystem_max32672.c53 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
96 base_freq = base_freq >> ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_DIV) >> in SystemCoreClockUpdate()
99 div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS; in SystemCoreClockUpdate()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32675/Source/
Dsystem_max32675.c55 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL); in SystemCoreClockUpdate()
98 base_freq = base_freq >> ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_DIV) >> in SystemCoreClockUpdate()
101 div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS; in SystemCoreClockUpdate()

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