1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 #include <string.h>
22 #include <stdio.h>
23 #include <stdlib.h>
24 #include "max32655.h"
25 #include "gcr_regs.h"
26 #include "mxc_sys.h"
27 #include "flc_regs.h"
28 #include "icc.h"
29 #include "simo.h"
30 
31 extern void (*const __isr_vector[])(void);
32 
33 uint32_t SystemCoreClock = HIRC_FREQ;
34 
35 /*
36 The libc implementation from GCC 11+ depends on _getpid and _kill in some places.
37 There is no concept of processes/PIDs in the baremetal PeriphDrivers, therefore
38 we implement stub functions that return an error code to resolve linker warnings.
39 */
_getpid(void)40 __weak int _getpid(void)
41 {
42     return E_NOT_SUPPORTED;
43 }
44 
_kill(void)45 __weak int _kill(void)
46 {
47     return E_NOT_SUPPORTED;
48 }
49 
SystemCoreClockUpdate(void)50 __weak void SystemCoreClockUpdate(void)
51 {
52     uint32_t base_freq, div, clk_src;
53 
54     // Get the clock source and frequency
55     clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL);
56     switch (clk_src) {
57     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_EXTCLK:
58         base_freq = EXTCLK_FREQ;
59         break;
60     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERFO:
61         base_freq = ERFO_FREQ;
62         break;
63     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_INRO:
64         base_freq = INRO_FREQ;
65         break;
66     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO:
67         base_freq = IPO_FREQ;
68         break;
69     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ISO:
70         base_freq = ISO_FREQ;
71         break;
72     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IBRO:
73         base_freq = IBRO_FREQ;
74         break;
75     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO:
76         base_freq = ERTCO_FREQ;
77         break;
78     default:
79         // Codes 001 and 111 are reserved.
80         // This code should never execute, however, initialize to safe value.
81         base_freq = HIRC_FREQ;
82         break;
83     }
84 
85     // Get the clock divider
86     div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS;
87 
88     SystemCoreClock = base_freq >> div;
89 }
90 
91 /* This function is called before C runtime initialization and can be
92  * implemented by the application for early initializations. If a value other
93  * than '0' is returned, the C runtime initialization will be skipped.
94  *
95  * You may over-ride this function in your program by defining a custom
96  *  PreInit(), but care should be taken to reproduce the initialization steps
97  *  or a non-functional system may result.
98  */
PreInit(void)99 __weak int PreInit(void)
100 {
101     uint32_t psc = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV;
102 
103     /* Divide down system clock until SIMO is ready */
104     MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) |
105                        (MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128);
106 
107     while (!(MXC_SIMO->buck_out_ready & MXC_F_SIMO_BUCK_OUT_READY_BUCKOUTRDYA)) {}
108     while (!(MXC_SIMO->buck_out_ready & MXC_F_SIMO_BUCK_OUT_READY_BUCKOUTRDYB)) {}
109     while (!(MXC_SIMO->buck_out_ready & MXC_F_SIMO_BUCK_OUT_READY_BUCKOUTRDYC)) {}
110 
111     /* Restore system clock divider */
112     MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) | (psc);
113 
114     return 0;
115 }
116 
117 /* This function can be implemented by the application to initialize the board */
Board_Init(void)118 __weak int Board_Init(void)
119 {
120     /* Do nothing */
121     return 0;
122 }
123 
PalSysInit(void)124 __weak void PalSysInit(void) {}
125 
126 /* This function is called just before control is transferred to main().
127  *
128  * You may over-ride this function in your program by defining a custom
129  *  SystemInit(), but care should be taken to reproduce the initialization
130  *  steps or a non-functional system may result.
131  */
SystemInit(void)132 __weak void SystemInit(void)
133 {
134     /* Configure the interrupt controller to use the application vector table in */
135     /* the application space */
136 #if defined(__CC_ARM) || defined(__GNUC__)
137     /* IAR sets the VTOR pointer incorrectly and causes stack corruption */
138     SCB->VTOR = (uint32_t)__isr_vector;
139 #endif /* __CC_ARM || __GNUC__ */
140 
141     /* Make sure interrupts are enabled. */
142     __enable_irq();
143 
144     /* Enable instruction cache */
145     MXC_ICC_Enable(MXC_ICC0);
146 
147     /* Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11 */
148     /* Grant full access, per "Table B3-24 CPACR bit assignments". */
149     /* DDI0403D "ARMv7-M Architecture Reference Manual" */
150     SCB->CPACR |= SCB_CPACR_CP10_Msk | SCB_CPACR_CP11_Msk;
151     __DSB();
152     __ISB();
153 
154     /* Setup the SIMO voltages */
155     MXC_SIMO_SetVregO_A(1750);
156     while (MXC_SIMO_GetOutReadyA() != E_NO_ERROR) {}
157     MXC_SIMO_SetVregO_B(1100);
158     while (MXC_SIMO_GetOutReadyB() != E_NO_ERROR) {}
159     MXC_SIMO_SetVregO_C(1100);
160     while (MXC_SIMO_GetOutReadyC() != E_NO_ERROR) {}
161 
162     /* Change system clock source to the main high-speed clock */
163     MXC_SYS_Clock_Select(MXC_SYS_CLOCK_IPO);
164     MXC_SYS_SetClockDiv(MXC_SYS_CLOCK_DIV_1);
165     SystemCoreClockUpdate();
166 
167     Board_Init();
168 
169     PalSysInit();
170 }
171 
172 #if defined(__CC_ARM)
173 /* Global variable initialization does not occur until post scatterload in Keil tools.*/
174 
175 /* External function called after our post scatterload function implementation. */
176 extern void $Super$$__main_after_scatterload(void);
177 
178 /**
179  * @brief   Initialization function for SystemCoreClock and Board_Init.
180  * @details $Sub$$__main_after_scatterload is called during system startup in the Keil
181  *          toolset. Global variable and static variable space must be set up by the compiler
182  *          prior to using these memory spaces. Setting up the SystemCoreClock and Board_Init
183  *          require global memory for variable storage and are called from this function in
184  *          the Keil tool chain.
185  */
$Sub$$__main_after_scatterload(void)186 void $Sub$$__main_after_scatterload(void)
187 {
188     SystemInit();
189     $Super$$__main_after_scatterload();
190     while (1) {}
191 }
192 #endif /* __CC_ARM */
193