1 /******************************************************************************
2  *
3  * Copyright (C) 2023 Analog Devices, Inc.
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  *     http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  ******************************************************************************/
18 
19 #include "max32655.h"
20 #include "gcr_regs.h"
21 #include "icc.h"
22 #include "simo.h"
23 #include "mcr_regs.h"
24 
pre_init(void)25 static int pre_init(void)
26 {
27     uint32_t psc = MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV;
28 
29     /* Divide down system clock until SIMO is ready */
30     MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) |
31                        (MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128);
32 
33     while (!(MXC_SIMO->buck_out_ready & MXC_F_SIMO_BUCK_OUT_READY_BUCKOUTRDYA)) {}
34     while (!(MXC_SIMO->buck_out_ready & MXC_F_SIMO_BUCK_OUT_READY_BUCKOUTRDYB)) {}
35     while (!(MXC_SIMO->buck_out_ready & MXC_F_SIMO_BUCK_OUT_READY_BUCKOUTRDYC)) {}
36 
37     /* Restore system clock divider */
38     MXC_GCR->clkctrl = (MXC_GCR->clkctrl & ~(MXC_F_GCR_CLKCTRL_SYSCLK_DIV)) | (psc);
39 
40     return 0;
41 }
42 
43 /*
44  * This function is called during boot up.
45  */
max32xx_system_init(void)46 void max32xx_system_init(void)
47 {
48     pre_init();
49 
50     /* Disable SRAM ECC until it is handled on zephyr side */
51     MXC_MCR->eccen &= ~MXC_F_MCR_ECCEN_RAM0;
52 
53     /* Enable instruction cache */
54     MXC_ICC_Enable(MXC_ICC0);
55 
56     /* Setup the SIMO voltages */
57     MXC_SIMO_SetVregO_A(1750);
58     while (MXC_SIMO_GetOutReadyA() != E_NO_ERROR) {}
59     MXC_SIMO_SetVregO_B(1100);
60     while (MXC_SIMO_GetOutReadyB() != E_NO_ERROR) {}
61     MXC_SIMO_SetVregO_C(1100);
62     while (MXC_SIMO_GetOutReadyC() != E_NO_ERROR) {}
63 }
64