/Zephyr-latest/include/zephyr/dt-bindings/clock/ |
D | stm32l1_clock.h | 14 #define STM32_CLOCK_BUS_APB1 0x024 macro 17 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB1
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D | stm32f1_clock.h | 16 #define STM32_CLOCK_BUS_APB1 0x01c macro 19 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB1
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D | stm32l0_clock.h | 15 #define STM32_CLOCK_BUS_APB1 0x038 macro 18 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB1
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D | stm32f0_clock.h | 14 #define STM32_CLOCK_BUS_APB1 0x01c macro 17 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB1
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D | stm32_clock.h | 12 #define STM32_CLOCK_BUS_APB1 2 macro
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D | stm32f3_clock.h | 14 #define STM32_CLOCK_BUS_APB1 0x01c macro 17 #define STM32_PERIPH_BUS_MAX STM32_CLOCK_BUS_APB1
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D | stm32wb0_clock.h | 24 #define STM32_CLOCK_BUS_APB1 0x58 macro
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D | stm32f4_clock.h | 17 #define STM32_CLOCK_BUS_APB1 0x040 macro
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D | stm32h7_clock.h | 47 #define STM32_CLOCK_BUS_APB1 0x0E8 macro 52 #define STM32_SRC_PCLK1 STM32_CLOCK_BUS_APB1
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D | stm32c0_clock.h | 14 #define STM32_CLOCK_BUS_APB1 0x03c macro
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
D | g0_i2c1_hsi_lptim1_lse_adc1_pllp.overlay | 68 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>, 74 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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D | g0_i2c1_sysclk_lptim1_lsi.overlay | 68 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>, 74 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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D | wb_i2c1_hsi_lptim1_lse.overlay | 74 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>, 80 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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D | l4_i2c1_hsi_lptim1_lse.overlay | 75 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>, 82 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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D | l4_i2c1_sysclk_lptim1_lsi.overlay | 75 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>, 82 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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D | wl_i2c1_sysclk_lptim1_lsi.overlay | 71 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>, 79 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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D | wl_i2c1_hsi_lptim1_lse_adc1_pllp.overlay | 85 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>, 93 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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/Zephyr-latest/boards/st/nucleo_g0b1re/ |
D | nucleo_g0b1re.dts | 106 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, 182 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>, 190 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>, 225 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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/Zephyr-latest/boards/weact/stm32g431_core/ |
D | weact_stm32g431_core.dts | 118 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, 124 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>, 183 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>,
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/Zephyr-latest/boards/others/candlelightfd/ |
D | candlelightfd_stm32g0b1xx_dual.dts | 24 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>,
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/Zephyr-latest/boards/seeed/lora_e5_mini/ |
D | lora_e5_mini.dts | 50 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>, 87 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
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/Zephyr-latest/boards/st/nucleo_g474re/ |
D | nucleo_g474re.dts | 158 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>, 164 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, 222 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>,
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/Zephyr-latest/drivers/clock_control/ |
D | clock_stm32_ll_mp1.c | 25 case STM32_CLOCK_BUS_APB1: in stm32_clock_control_on() 76 case STM32_CLOCK_BUS_APB1: in stm32_clock_control_off() 128 case STM32_CLOCK_BUS_APB1: in stm32_clock_control_get_subsys_rate()
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/Zephyr-latest/boards/olimex/lora_stm32wl_devkit/ |
D | olimex_lora_stm32wl_devkit.dts | 49 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>, 117 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
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/Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/boards/ |
D | nucleo_h563zi.overlay | 9 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>,
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