Home
last modified time | relevance | path

Searched refs:REGION_RAM_ATTR (Results 1 – 25 of 27) sorted by relevance

12

/Zephyr-latest/soc/nuvoton/numaker/m55m1x/
Dmpu_regions.c17 REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, CONFIG_SRAM_SIZE * 1024)),
22 REGION_RAM_ATTR(DT_REG_ADDR(DT_NODELABEL(itcm)),
29 REGION_RAM_ATTR(DT_REG_ADDR(DT_NODELABEL(dtcm)),
/Zephyr-latest/arch/arm/core/mpu/
Darm_mpu_regions.c29 REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
32 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
Darm_mpu.c112 region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_ATTR); in mpu_configure_regions_from_dt()
/Zephyr-latest/arch/arc/core/mpu/
Darc_mpu.c40 return REGION_RAM_ATTR; in get_region_attr_by_type()
44 return REGION_RAM_ATTR; in get_region_attr_by_type()
/Zephyr-latest/soc/nxp/imxrt/imxrt118x/m7/
Dmpu_regions.c24 REGION_RAM_ATTR(REGION_FLEXSPI2_SIZE)),
27 MPU_REGION_ENTRY("DTCM", REGION_DTCM_BASE_ADDRESS, REGION_RAM_ATTR(REGION_DTCM_SIZE)),
/Zephyr-latest/soc/nxp/imxrt/
Dmpu_regions.c20 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
/Zephyr-latest/soc/nuvoton/npcx/npcx7/
Dmpu_regions.c20 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
/Zephyr-latest/soc/nxp/kinetis/k2x/
Dnxp_mpu_regions.c52 REGION_RAM_ATTR),
/Zephyr-latest/soc/nxp/kinetis/k6x/
Dnxp_mpu_regions.c52 REGION_RAM_ATTR),
/Zephyr-latest/soc/nxp/kinetis/k8x/
Dnxp_mpu_regions.c49 REGION_RAM_ATTR),
/Zephyr-latest/soc/nxp/kinetis/ke1xf/
Dnxp_mpu_regions.c49 REGION_RAM_ATTR),
/Zephyr-latest/soc/nxp/s32/s32k3/
Dmpu_regions.c21 .attr = REGION_RAM_ATTR(REGION_SRAM_SIZE),
/Zephyr-latest/soc/nxp/s32/s32k1/
Dnxp_mpu_regions.c38 REGION_RAM_ATTR),
/Zephyr-latest/soc/arm/fvp_aemv8r/aarch64/
Darm_mpu_regions.c40 REGION_RAM_ATTR),
/Zephyr-latest/soc/arm/fvp_aemv8r/aarch32/
Darm_mpu_regions.c32 REGION_RAM_ATTR((uintptr_t)__kernel_ram_end)),
/Zephyr-latest/soc/nxp/s32/s32ze/
Dmpu_regions.c33 REGION_RAM_ATTR((uintptr_t)__kernel_ram_end)),
/Zephyr-latest/soc/infineon/cat1b/cyw20829/
Dmpu_regions.c25 REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, CONFIG_SRAM_SIZE * 1024)),
/Zephyr-latest/soc/nxp/imxrt/imxrt118x/m33/
Dmpu_regions.c23 REGION_RAM_ATTR(REGION_FLEXSPI2_BASE_ADDRESS, REGION_FLEXSPI2_SIZE)),
/Zephyr-latest/soc/st/stm32/stm32h7x/
Dmpu_regions.c14 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
/Zephyr-latest/include/zephyr/arch/arm/mpu/
Dnxp_mpu.h82 #define REGION_RAM_ATTR \ macro
89 #define REGION_RAM_ATTR \ macro
Darm_mpu_v8.h175 #define REGION_RAM_ATTR(limit) \ macro
240 #define REGION_RAM_ATTR(base, size) \ macro
Darm_mpu_v7m.h120 #define REGION_RAM_ATTR(size) \ macro
/Zephyr-latest/soc/nordic/common/
Dnrf54hx_nrf92x_mpu_regions.c28 REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS,
/Zephyr-latest/include/zephyr/arch/arc/v2/mpu/
Darc_mpu.h38 #define REGION_RAM_ATTR \ macro
/Zephyr-latest/include/zephyr/arch/arm64/cortex_r/
Darm_mpu.h143 #define REGION_RAM_ATTR \ macro

12