1 /* 2 * Copyright (c) 2020 Mario Jaun 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <zephyr/devicetree.h> 8 #include <zephyr/arch/arm/cortex_m/arm_mpu_mem_cfg.h> 9 10 static const struct arm_mpu_region mpu_regions[] = { 11 MPU_REGION_ENTRY("FLASH", CONFIG_FLASH_BASE_ADDRESS, 12 REGION_FLASH_ATTR(REGION_FLASH_SIZE)), 13 MPU_REGION_ENTRY("SRAM", CONFIG_SRAM_BASE_ADDRESS, 14 REGION_RAM_ATTR(REGION_SRAM_SIZE)), 15 /* 16 * System memory attributes inhibit the speculative fetch, 17 * preventing the RDSERR Flash error 18 */ 19 MPU_REGION_ENTRY("SYSTEM", 0x1FF00000, 20 { (STRONGLY_ORDERED_SHAREABLE | 21 REGION_512K | 22 MPU_RASR_XN_Msk | P_RW_U_NA_Msk) }), 23 24 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(mac)) 25 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sram3)) 26 MPU_REGION_ENTRY("SRAM3_ETH_BUF", 27 DT_REG_ADDR(DT_NODELABEL(sram3)), 28 REGION_RAM_NOCACHE_ATTR(REGION_16K)), 29 MPU_REGION_ENTRY("SRAM3_ETH_DESC", 30 DT_REG_ADDR(DT_NODELABEL(sram3)), 31 REGION_PPB_ATTR(REGION_256B)), 32 #else 33 MPU_REGION_ENTRY("SRAM2_ETH_BUF", 34 DT_REG_ADDR(DT_NODELABEL(sram2)), 35 REGION_RAM_NOCACHE_ATTR(REGION_16K)), 36 MPU_REGION_ENTRY("SRAM2_ETH_DESC", 37 DT_REG_ADDR(DT_NODELABEL(sram2)), 38 REGION_PPB_ATTR(REGION_256B)), 39 #endif 40 #endif 41 }; 42 43 const struct arm_mpu_config mpu_config = { 44 .num_regions = ARRAY_SIZE(mpu_regions), 45 .mpu_regions = mpu_regions, 46 }; 47
