| /Zephyr-latest/dts/bindings/flash_controller/ |
| D | st,stm32-xspi-nor.yaml | 1 # Copyright (c) 2021 - 2024 STMicroelectronics
2 # SPDX-License-Identifier: Apache-2.0
7 Representation of a serial flash on a xspi bus:
9 mx25lm51245: xspi-nor-flash@70000000 {
10 compatible = "st,stm32-xspi-nor";
12 data-mode = <XSPI_OCTO_MODE>; /* access on 8 data lines */
13 data-rate = <XSPI_DTR_TRANSFER>; /* access in DTR */
14 ospi-max-frequency = <DT_FREQ_M(50)>;
18 compatible: "st,stm32-xspi-nor"
21 - name: st,stm32-ospi-nor.yaml
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| D | st,stm32-qspi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 Representation of a serial flash on a quadspi bus:
9 mx25r6435f: qspi-nor-flash@90000000 {
10 compatible = "st,stm32-qspi-nor";
12 qspi-max-frequency = <80000000>;
13 reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
14 reset-gpios-duration = <1>;
15 spi-bus-width = <4>;
19 compatible: "st,stm32-qspi-nor"
21 include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
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| D | st,stm32-ospi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 Representation of a serial flash on a octospi bus:
9 mx25lm51245: ospi-nor-flash@70000000 {
10 compatible = "st,stm32-ospi-nor";
12 data-mode = <OSPI_OPI_MODE>; /* access on 8 data lines */
13 data-rate = <OSPI_DTR_TRANSFER>; /* access in DTR */
14 ospi-max-frequency = <DT_FREQ_M(50)>;
18 compatible: "st,stm32-ospi-nor"
20 include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
22 on-bus: ospi
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| /Zephyr-latest/drivers/display/ |
| D | ssd1306.c | 4 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/drivers/spi.h>
32 struct spi_dt_spec spi; member
41 union ssd1306_bus bus; member
48 uint16_t width; member
71 const struct ssd1306_config *config = dev->config; in ssd1306_bus_ready_i2c()
73 return i2c_is_ready_dt(&config->bus.i2c); in ssd1306_bus_ready_i2c()
78 const struct ssd1306_config *config = dev->config; in ssd1306_write_bus_i2c()
80 return i2c_burst_write_dt(&config->bus.i2c, in ssd1306_write_bus_i2c()
88 const struct ssd1306_config *config = dev->config; in ssd1306_bus_name_i2c()
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| D | ls0xx.c | 4 * SPDX-License-Identifier: Apache-2.0
17 #include <zephyr/drivers/spi.h>
25 * -> high/1 means white, low/0 means black
26 * -> Display expects LSB first
29 #define LS0XX_PANEL_WIDTH DT_INST_PROP(0, width)
35 * +-------------------+-------------------+----------------+
36 * | line num (8 bits) | data (WIDTH bits) | dummy (8 bits) |
37 * +-------------------+-------------------+----------------+
46 struct spi_dt_spec bus; member
62 gpio_pin_toggle_dt(&config->extcomin_gpio); in ls0xx_vcom_toggle()
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| /Zephyr-latest/dts/bindings/mtd/ |
| D | atmel,at25.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 SPI EEPROMs compatible with Atmel's AT25 family
7 There are multiple vendors manufacturing SPI EEPROMs compatible with the programming model of the
11 - Microchip AT25xxx
12 - ST M95xxx
15 width, and timeout) available from the datasheet of the specific EEPROM. The compatible string for
17 the least-specific compatible entry is "atmel,at25".
19 Example devicetree node describing a ST M95256 EEPROM on the spi0 bus:
29 address-width = <16>;
30 spi-max-frequency = <DT_FREQ_M(20)>;
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| /Zephyr-latest/drivers/eeprom/ |
| D | eeprom_at2x.c | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Driver for Atmel AT24 I2C and Atmel AT25 SPI EEPROMs.
15 #include <zephyr/drivers/spi.h>
32 #define EEPROM_AT25_STATUS_WIP BIT(0) /* Write-In-Process (RO) */
47 struct spi_dt_spec spi; member
49 } bus; member
70 const struct eeprom_at2x_config *config = dev->config; in eeprom_at2x_write_protect()
72 if (!config->wp_gpio.port) { in eeprom_at2x_write_protect()
76 return gpio_pin_set_dt(&config->wp_gpio, 1); in eeprom_at2x_write_protect()
81 const struct eeprom_at2x_config *config = dev->config; in eeprom_at2x_write_enable()
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| /Zephyr-latest/subsys/sd/ |
| D | sdmmc.c | 4 * SPDX-License-Identifier: Apache-2.0
25 scr->flags = 0U; in sdmmc_decode_scr()
26 scr->scr_structure = (uint8_t)((raw_scr[0U] & 0xF0000000U) >> 28U); in sdmmc_decode_scr()
27 scr->sd_spec = (uint8_t)((raw_scr[0U] & 0xF000000U) >> 24U); in sdmmc_decode_scr()
29 scr->flags |= SD_SCR_DATA_STATUS_AFTER_ERASE; in sdmmc_decode_scr()
31 scr->sd_sec = (uint8_t)((raw_scr[0U] & 0x700000U) >> 20U); in sdmmc_decode_scr()
32 scr->sd_width = (uint8_t)((raw_scr[0U] & 0xF0000U) >> 16U); in sdmmc_decode_scr()
34 scr->flags |= SD_SCR_SPEC3; in sdmmc_decode_scr()
36 scr->sd_ext_sec = (uint8_t)((raw_scr[0U] & 0x7800U) >> 10U); in sdmmc_decode_scr()
37 scr->cmd_support = (uint8_t)(raw_scr[0U] & 0x3U); in sdmmc_decode_scr()
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| D | mmc.c | 4 * SPDX-License-Identifier: Apache-2.0
45 #define MMC_REL_ADR_ARG (card->relative_addr << 16U)
89 /* Sends CMD6 to switch bus width*/
109 /* SPI is not supported for MMC */ in mmc_card_init()
110 if (card->host_props.is_spi) { in mmc_card_init()
111 return -EINVAL; in mmc_card_init()
122 card->type = CARD_MMC; in mmc_card_init()
125 if (card->host_props.host_caps.vol_180_support) { in mmc_card_init()
128 if (card->host_props.host_caps.vol_330_support || in mmc_card_init()
129 card->host_props.host_caps.vol_300_support) { in mmc_card_init()
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| /Zephyr-latest/samples/subsys/fs/littlefs/boards/ |
| D | nucleo_h743zi.overlay | 5 * SPDX-License-Identifier: Apache-2.0
7 /delete-node/ &storage_partition;
11 pinctrl-0 = <&sdmmc1_d0_pc8
15 pinctrl-names = "default";
23 read-size = <32>;
24 prog-size = <32>;
25 cache-size = <256>;
26 lookahead-size = <64>;
27 block-cycles = <512>;
29 mount-point = "/lfs1";
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| /Zephyr-latest/boards/norik/octopus_io_board/doc/ |
| D | index.rst | 6 Octopus IO-Board is an expansion to the Octopus SoM, which is built around the nRF9160 SiP
7 offering NB-IoT and LTE-M connectivity, GPS and accelerometer. Octopus IO-Board expands
9 development and prototyping of low-power IoT applications.
11 nRF9160 SiP contains ARM Cortex-M33 application processor and the
18 * :abbr:`I2C (Inter-Integrated Circuit)`
21 * :abbr:`PWM (Pulse Width Modulation)`
24 * :abbr:`SPI (Serial Peripheral Interface)`
25 * :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)`
29 Octopus IO-Board offers the following features:
32 * USB-C for power
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| /Zephyr-latest/boards/lilygo/ttgo_lora32/ |
| D | ttgo_lora32_esp32_procpu.dts | 4 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include "ttgo_lora32-pinctrl.dtsi"
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 compatible = "lilygo,ttgo-lora32";
19 uart-0 = &uart0;
20 i2c-0 = &i2c0;
29 zephyr,shell-uart = &uart0;
31 zephyr,code-partition = &slot0_partition;
37 compatible = "gpio-leds";
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| /Zephyr-latest/dts/bindings/dma/ |
| D | st,stm32-dmamux.yaml | 2 # SPDX-License-Identifier: Apache-2.0
9 DMAMUX clients connected to the STM32 DMA ultiplexer must use a two-cell specifier
11 1. channel: the mux channel from 0 to <dma-channels> - 1
13 3. channel-config: A 32bit mask specifying the DMA channel configuration
15 -bit 6-7 : Direction (see dma.h)
20 -bit 9 : Peripheral Increment Address
23 -bit 10 : Memory Increment Address
26 -bit 11-12 : Peripheral data size
28 0x1: Half-word (16 bits)
31 -bit 13-14 : Memory data size
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| /Zephyr-latest/boards/espressif/esp_wrover_kit/ |
| D | esp_wrover_kit_procpu.dts | 4 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include "esp_wrover_kit-pinctrl.dtsi"
13 model = "Espressif ESP32-Wrover-Kit PROCPU";
20 pwm-led0 = &pwm_led_red;
21 pwm-led1 = &pwm_led_green;
22 pwm-led2 = &pwm_led_blue;
23 red-pwm-led = &pwm_led_red;
24 green-pwm-led = &pwm_led_green;
25 blue-pwm-led = &pwm_led_blue;
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| /Zephyr-latest/boards/fanke/fk750m1_vbt6/ |
| D | fk750m1_vbt6.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h750vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15 model = "FANKE FK750M1-VBT6 board";
16 compatible = "fanke,fk750m1-vbt6";
20 zephyr,shell-uart = &usart1;
27 compatible = "gpio-leds";
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| /Zephyr-latest/boards/weact/mini_stm32h7b0/ |
| D | mini_stm32h7b0.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b0vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15 compatible = "weact,mini-stm32h7b0";
19 zephyr,shell-uart = &usb_cdc_acm_uart;
26 compatible = "gpio-leds";
34 compatible = "gpio-keys";
43 compatible = "zephyr,mipi-dbi-spi";
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | sdhc.h | 4 * SPDX-License-Identifier: Apache-2.0
37 #define SDHC_TIMEOUT_FOREVER (-1)
74 * @brief SD bus mode.
76 * Most controllers will use push/pull, including spi, but
98 * @brief SD host controller bus width
100 * Only relevant in SD mode, SPI does not support bus width. UHS cards will
101 * use 4 bit data bus, all cards start in 1 bit mode
113 * to the bus. Cards start with legacy timing, but UHS-II cards can go up to
144 * Only relevant for SD controllers, not SPI ones.
169 unsigned int bus_8_bit_support: 1; /**< 8-bit Support for embedded device */
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| /Zephyr-latest/boards/fanke/fk7b0m1_vbt6/ |
| D | fk7b0m1_vbt6.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b0vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "FANKE FK7B0M1-VBT6 board";
15 compatible = "fanke,fk7b0m1-vbt6";
19 zephyr,shell-uart = &usart1;
25 compatible = "gpio-leds";
33 compatible = "gpio-keys";
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| /Zephyr-latest/boards/vcc-gnd/yd_stm32h750vb/ |
| D | yd_stm32h750vb.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h750vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "VCC-GND Studio STM32H750VB";
20 spi-flash0 = &w25q128jv;
25 zephyr,shell-uart = &usart1;
28 zephyr,flash-controller = &w25q128jv;
32 compatible = "gpio-leds";
54 compatible = "gpio-keys";
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| /Zephyr-latest/dts/common/nordic/ |
| D | nrf54l_05_10_15.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
12 /delete-node/ &sw_pwm;
19 #address-cells = <1>;
20 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,cortex-m33f";
30 clock-frequency = <DT_FREQ_M(128)>;
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| D | nrf9280.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/nrf-saadc.h>
10 #include <zephyr/dt-bindings/misc/nordic-nrf-ficr-nrf9230-engb.h>
11 #include <zephyr/dt-bindings/misc/nordic-domain-id-nrf9230.h>
12 #include <zephyr/dt-bindings/misc/nordic-owner-id-nrf9230.h>
13 #include <zephyr/dt-bindings/reserved-memory/nordic-owned-memory.h>
15 /delete-node/ &sw_pwm;
18 #address-cells = <1>;
19 #size-cells = <1>;
22 #address-cells = <1>;
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| /Zephyr-latest/boards/atmel/sam0/samd21_xpro/doc/ |
| D | index.rst | 7 prototyping with the SAM D21 Cortex®-M0+ processor-based
15 - SAMD21J18 ARM Cortex-M0+ processor at 48 MHz
16 - 32.768 kHz crystal oscillator
17 - 256 KiB flash memory and 32 KiB of RAM
18 - One yellow user LED
19 - One mechanical user push button
20 - One reset button
21 - On-board USB based EDBG unit with serial console
29 .. list-table::
30 :header-rows: 1
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| /Zephyr-latest/boards/croxel/croxel_cx1825/doc/ |
| D | index.rst | 7 Semiconductor nRF52840 ARM Cortex-M4F CPU and the following devices:
13 * :abbr:`I2C (Inter-Integrated Circuit)`
16 * :abbr:`PWM (Pulse Width Modulation)`
20 * :abbr:`SPI (Serial Peripheral Interface)`
21 * :abbr:`USB (Universal Serial Bus)`
27 - Ezurio's BL654 (nRF52840 ARM Cortex-M4F processor at 64MHz)
28 - 1 MB flash memory and 256 KB of SRAM
29 - Coin-cell retainer for Lithium coincell batteries
30 - 2 Discrete LEDs (Red and Green)
31 - User Button
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| /Zephyr-latest/boards/weact/mini_stm32h743/ |
| D | mini_stm32h743.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h743vitx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15 compatible = "weact,mini-stm32h743";
24 compatible = "gpio-leds";
32 compatible = "gpio-keys";
41 compatible = "zephyr,mipi-dbi-spi";
42 spi-dev = <&spi4>;
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| /Zephyr-latest/doc/services/rtio/ |
| D | index.rst | 11 :width: 800
45 lock-free ring buffers acting as queues shared between the kernel and a userland
55 potentially involving multiple peripheral IPs like bus and DMA controllers.
63 For example imagine a typical SPI transfer where you wish to write a
68 3. Write register address into SPI transmit register
69 4. Read from the SPI receive register into a buffer
84 Because the chip select and clocking is common to a particular SPI controller
85 and device on the bus it is embodied in what RTIO calls an iodev.
109 submissions, transactional sets of submissions, or create multi-shot
148 .. code-block:: C
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