1# Copyright (c) 2020, Linaro limited
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5    STM32 QSPI Flash controller supporting the JEDEC CFI interface
6
7    Representation of a serial flash on a quadspi bus:
8
9        mx25r6435f: qspi-nor-flash@90000000 {
10                compatible = "st,stm32-qspi-nor";
11                reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
12                qspi-max-frequency = <80000000>;
13                reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
14                reset-gpios-duration = <1>;
15                spi-bus-width = <4>;
16                status = "okay";
17        };
18
19compatible: "st,stm32-qspi-nor"
20
21include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
22
23on-bus: qspi
24
25properties:
26  reg:
27    required: true
28    description: Flash Memory base address and size in bytes
29  qspi-max-frequency:
30    type: int
31    required: true
32    description: Maximum clock frequency of device's QSPI interface in Hz
33  reset-gpios:
34    type: phandle-array
35    description: RESETn pin
36  reset-gpios-duration:
37    type: int
38    description: The duration (in ms) for the flash memory reset pulse
39  reset-cmd:
40    type: boolean
41    description: Send reset command on initialization
42  reset-cmd-wait:
43    type: int
44    default: 10
45    description: The duration (in us) to wait after reset command
46  spi-bus-width:
47    type: int
48    description: The width of (Q)SPI bus to which flash memory is connected.
49                 Now only value of 4 (when using SIO[0123]) is supported.
50  writeoc:
51    type: string
52    enum:
53      - "PP_1_1_4"      # Quad data line SPI, PP 1-1-4 (0x32)
54      - "PP_1_4_4"      # Quad data line SPI, PP 1-4-4 (0x38)
55    description: |
56      The value encodes number of I/O lines used for the opcode,
57      address, and data.
58
59      There is no info about quad page program opcodes in the SFDP
60      tables, hence it has been assumed that NOR flash memory
61      supporting 1-4-4 mode also would support fast page programming.
62
63      If absent, then 1-4-4 program page is used in quad mode.
64
65  requires-ulbpr:
66    type: boolean
67    description: |
68      Indicates the device requires the ULBPR (0x98) command.
69
70      Some flash chips such as the Microchip SST26VF series have a block
71      protection register that initializes to write-protected.  Use this
72      property to indicate that the BPR must be unlocked before write
73      operations can proceed.
74