1/* 2 * Copyright (c) 2024 Charles Dias <charlesdias.cd@outlook.com> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8#include <st/h7/stm32h743Xi.dtsi> 9#include <st/h7/stm32h743vitx-pinctrl.dtsi> 10#include <zephyr/dt-bindings/input/input-event-codes.h> 11#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h> 12 13/ { 14 model = "WeAct Studio MiniSTM32H743 Core Board"; 15 compatible = "weact,mini-stm32h743"; 16 17 chosen { 18 zephyr,sram = &sram0; 19 zephyr,flash = &flash0; 20 zephyr,display = &st7735r_160x80; 21 }; 22 23 leds { 24 compatible = "gpio-leds"; 25 user_led: led { 26 gpios = <&gpioe 3 GPIO_ACTIVE_HIGH>; 27 label = "User LED"; 28 }; 29 }; 30 31 gpio_keys { 32 compatible = "gpio-keys"; 33 user_button: button { 34 label = "User PB"; 35 gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; 36 zephyr,code = <INPUT_KEY_0>; 37 }; 38 }; 39 40 mipi_dbi_st7735r_160x80 { 41 compatible = "zephyr,mipi-dbi-spi"; 42 spi-dev = <&spi4>; 43 dc-gpios = <&gpioe 13 GPIO_ACTIVE_HIGH>; 44 #address-cells = <1>; 45 #size-cells = <0>; 46 47 st7735r_160x80: st7735r@0 { 48 compatible = "sitronix,st7735r"; 49 mipi-max-frequency = <20000000>; 50 mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; 51 reg = <0>; 52 width = <160>; 53 height = <80>; 54 inversion-on; 55 rgb-is-inverted; 56 x-offset = <1>; 57 y-offset = <26>; 58 pwctr1 = [A2 02 84]; 59 pwctr2 = [C5]; 60 pwctr3 = [0A 00]; 61 pwctr4 = [8A 2A]; 62 pwctr5 = [8A EE]; 63 invctr = <7>; 64 frmctr1 = [01 2C 2D]; 65 frmctr2 = [01 2C 2D]; 66 frmctr3 = [01 2C 2D 01 2C 2D]; 67 vmctr1 = <14>; 68 gamctrp1 = [02 1C 07 12 37 32 29 2D 29 25 2B 39 00 01 03 10]; 69 gamctrn1 = [03 1D 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10]; 70 colmod = <5>; 71 /* Set D3 (RGB) bit to 1. LV_COLOR_16_SWAP is enabled by default */ 72 madctl = <120>; /* Set to <184> to rotate the image 180 degrees. */ 73 caset = [00 01 00 a0]; 74 raset = [00 1a 00 69]; 75 }; 76 }; 77 78 aliases { 79 led0 = &user_led; 80 sw0 = &user_button; 81 watchdog0 = &iwdg; 82 sdhc0 = &sdmmc1; 83 }; 84 85 dcmi_camera_connector: connector_dcmi_camera { 86 compatible = "weact,dcmi-camera-connector"; 87 #gpio-cells = <2>; 88 gpio-map-mask = <0xffffffff 0xffffffc0>; 89 gpio-map-pass-thru = <0 0x3f>; 90 91 gpio-map = <3 0 &gpiob 9 0>, /* DVP_SDA (I2C1_SDA) */ 92 <5 0 &gpiob 8 0>, /* DVP_SCL (I2C1_SCL) */ 93 <7 0 &gpiob 7 0>, /* DVP_VSYNC */ 94 <8 0 &gpioa 7 0>, /* DVP_PWDN */ 95 <9 0 &gpioa 4 0>, /* DVP_HSYNC */ 96 <12 0 &gpioe 6 0>, /* DVP_D7 */ 97 <13 0 &gpioa 8 0>, /* DVP_XCLK (RCC_MCO1) */ 98 <14 0 &gpioe 5 0>, /* DVP_D6 */ 99 <16 0 &gpiod 3 0>, /* DVP_D5 */ 100 <17 0 &gpioa 6 0>, /* DVP_PCLK */ 101 <18 0 &gpioe 4 0>, /* DVP_D4 */ 102 <19 0 &gpioc 6 0>, /* DVP_D0 */ 103 <20 0 &gpioe 1 0>, /* DVP_D3 */ 104 <21 0 &gpioc 7 0>, /* DVP_D1 */ 105 <22 0 &gpioe 0 0>; /* DVP_D2 */ 106 }; 107}; 108 109&clk_lsi { 110 status = "okay"; 111}; 112 113&clk_hsi48 { 114 status = "okay"; 115}; 116 117&clk_hse { 118 clock-frequency = <DT_FREQ_M(25)>; 119 status = "okay"; 120}; 121 122&pll { 123 div-m = <5>; 124 mul-n = <96>; 125 div-p = <2>; 126 div-q = <10>; 127 div-r = <2>; 128 clocks = <&clk_hse>; 129 status = "okay"; 130}; 131 132&rcc { 133 clocks = <&pll>; 134 clock-frequency = <DT_FREQ_M(240)>; 135 d1cpre = <1>; 136 hpre = <2>; 137 d1ppre = <1>; 138 d2ppre1 = <1>; 139 d2ppre2 = <1>; 140 d3ppre = <1>; 141}; 142 143&sdmmc1 { 144 pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9 145 &sdmmc1_d2_pc10 &sdmmc1_d3_pc11 146 &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>; 147 pinctrl-names = "default"; 148 cd-gpios = <&gpiod 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; 149 status = "okay"; 150}; 151 152zephyr_udc0: &usbotg_fs { 153 pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; 154 pinctrl-names = "default"; 155 status = "okay"; 156}; 157 158#include <../boards/common/usb/cdc_acm_serial.dtsi> 159 160&quadspi { 161 pinctrl-names = "default"; 162 pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6 163 &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12 164 &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>; 165 flash-id = <1>; 166 status = "okay"; 167 168 w25q64_qspi: qspi-nor-flash@90000000 { 169 compatible = "st,stm32-qspi-nor"; 170 reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */ 171 qspi-max-frequency = <40000000>; 172 status = "okay"; 173 spi-bus-width = <4>; 174 writeoc = "PP_1_1_4"; 175 176 partitions { 177 compatible = "fixed-partitions"; 178 #address-cells = <1>; 179 #size-cells = <1>; 180 slot0_partition: partition@0 { 181 reg = <0x00000000 DT_SIZE_M(8)>; 182 }; 183 }; 184 }; 185}; 186 187&spi1 { 188 pinctrl-0 = <&spi1_sck_pb3 &spi1_miso_pb4 &spi1_mosi_pd7>; 189 cs-gpios = <&gpiod 6 GPIO_ACTIVE_LOW>; 190 pinctrl-names = "default"; 191 status = "okay"; 192 w25q64_spi: spi-nor-flash@0 { 193 compatible = "jedec,spi-nor"; 194 reg = <0>; 195 spi-max-frequency = <40000000>; 196 size = <DT_SIZE_M(64)>; /* 64 Mbits */ 197 status = "okay"; 198 jedec-id = [ef 40 17]; 199 has-dpd; 200 t-enter-dpd = <3500>; 201 t-exit-dpd = <3500>; 202 partitions { 203 compatible = "fixed-partitions"; 204 #address-cells = <1>; 205 #size-cells = <1>; 206 storage_partition: partition@0 { 207 label = "storage"; 208 reg = <0x00000000 DT_SIZE_M(8)>; 209 }; 210 }; 211 }; 212}; 213 214&gpioe { 215 status = "okay"; 216 217 lcd_led { 218 gpio-hog; 219 gpios = <10 GPIO_ACTIVE_LOW>; 220 output-high; 221 }; 222}; 223 224&spi4 { 225 pinctrl-0 = <&spi4_sck_pe12 &spi4_mosi_pe14>; 226 cs-gpios = <&gpioe 11 GPIO_ACTIVE_LOW>; 227 pinctrl-names = "default"; 228 status = "okay"; 229}; 230 231&rng { 232 status = "okay"; 233}; 234 235&backup_sram { 236 status = "okay"; 237}; 238 239&iwdg1 { 240 status = "okay"; 241}; 242 243zephyr_camera_i2c: &i2c1 { 244 pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; 245 pinctrl-names = "default"; 246}; 247 248zephyr_camera_dvp: &dcmi { 249 pinctrl-0 = <&dcmi_hsync_pa4 &dcmi_pixclk_pa6 &dcmi_vsync_pb7 250 &dcmi_d0_pc6 &dcmi_d1_pc7 &dcmi_d2_pe0 &dcmi_d3_pe1 251 &dcmi_d4_pe4 &dcmi_d5_pd3 &dcmi_d6_pe5 &dcmi_d7_pe6>; 252 pinctrl-names = "default"; 253}; 254