requirements\-dev (full) in projects: hal_stm32-3.6.0

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/hal_stm32-3.6.0/.github/workflows/
D	test.yml	`7 runs-on: ubuntu-latest 9 fail-fast: false 11 python-version: ['3.7', '3.8', '3.9', '3.10'] 13 - uses: actions/checkout@v1 14 - name: Set up Python 15 uses: actions/setup-python@v1 17 python-version: ${{ matrix.python-version }} 18 - name: install dependencies 20 pip3 install -r scripts/requirements.txt 21 pip3 install -r scripts/requirements-test.txt [all …]`
/hal_stm32-3.6.0/stm32cube/stm32mp1xx/soc/
D	stm32mp157axx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp157dxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp153cxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp153fxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp153axx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp153dxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp151fxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp151cxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp151axx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp151dxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp153cxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp153fxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp153axx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp153dxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp151fxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp151cxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp151axx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp151dxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp157fxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp157cxx_cm4.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-M Processor Exceptions Numbers ************************************************… 60 …NonMaskableInt_IRQn = -14, /!< 2 Non Maskable Interrupt … 61 …HardFault_IRQn = -13, /!< 4 Cortex-M Memory Management Interrupt … 62 …MemoryManagement_IRQn = -12, /!< 4 Cortex-M Memory Management Interrupt … 63 …BusFault_IRQn = -11, /!< 5 Cortex-M Bus Fault Interrupt … 64 …UsageFault_IRQn = -10, /!< 6 Cortex-M Usage Fault Interrupt … [all …]
D	stm32mp157cxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp157fxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp157axx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]
D	stm32mp157dxx_ca7.h	8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripherals registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 59 …/**** Cortex-A Processor Specific Interrupt Numbers ****************************************… 83 …NonSecurePhysicalTimer_IRQn = 30, /!< Non-Secure Physical Timer Interrupt … 180 …CEC_IRQn = 126, /!< HDMI-CEC global Interrupt … 183 …SPDIF_RX_IRQn = 129, /!< SPDIF-RX global Interrupt … 235 …WAKEUP_PIN_IRQn = 181, /!< Interrupt for all 6 wake-up pins … 256 @brief Configuration of the Cortex-M4/ Cortex-M7 Processor and Core Peripherals [all …]

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0