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/Zephyr-latest/snippets/ram-console/
DREADME.rst1 .. _snippet-ram-console:
3 RAM Console Snippet (ram-console)
6 .. code-block:: console
8 west build -S ram-console [...]
13 This snippet redirects console output to a RAM buffer. The RAM console
14 buffer is a global array located in RAM region by default, whose address
15 is unknown before building. The RAM console driver also supports using
16 a dedicated section for the RAM console buffer with prefined address.
18 How to enable RAM console buffer section
21 Add board dts overlay to this snippet to add property ``zephyr,ram-console``
[all …]
/Zephyr-latest/dts/arm/st/h7/
Dstm32h743.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/display/panel.h>
12 compatible = "st,stm32h743", "st,stm32h7", "simple-bus";
14 flash-controller@52002000 {
16 compatible = "st,stm32-nv-flash", "soc-nv-flash";
17 write-block-size = <32>;
18 erase-block-size = <DT_SIZE_K(128)>;
20 max-erase-time = <4000>;
25 dma-requests= <107>;
29 dma-requests= <107>;
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Dstm32h745.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/display/panel.h>
12 compatible = "st,stm32h745", "st,stm32h7", "simple-bus";
14 flash-controller@52002000 {
16 compatible = "st,stm32-nv-flash", "soc-nv-flash";
17 write-block-size = <32>;
18 erase-block-size = <DT_SIZE_K(128)>;
20 max-erase-time = <4000>;
23 compatible = "st,stm32-nv-flash", "soc-nv-flash";
24 write-block-size = <32>;
[all …]
Dstm32h7a3.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/display/panel.h>
9 #include <zephyr/dt-bindings/flash_controller/ospi.h>
11 /delete-node/ &adc3;
15 compatible = "st,stm32h7a3", "st,stm32h7", "simple-bus";
17 flash-controller@52002000 {
19 compatible = "st,stm32-nv-flash", "soc-nv-flash";
20 write-block-size = <16>;
21 erase-block-size = <DT_SIZE_K(8)>;
23 max-erase-time = <3>;
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/Zephyr-latest/dts/bindings/disk/
Dzephyr,ram-disk.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: RAM disk
6 compatible: "zephyr,ram-disk"
8 include: ["base.yaml", "memory-region.yaml"]
11 disk-name:
17 sector-size:
24 sector-count:
30 ram-region:
33 Optional phandle to the memory region to be used as a RAM disk,
/Zephyr-latest/boards/qemu/arc/
Darc_mpu_regions.c4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/linker/linker-defs.h>
19 /* Region Coverage */
29 /* Region RAM */
30 MPU_REGION_ENTRY("RAM",
35 /* Region RAM */
38 * SRAM. So RAM region should have EXECUTE permission.
54 /* Region DCCM */
62 * Region peripheral is shared by secure world and normal world by default,
67 /* Region Peripheral */
/Zephyr-latest/include/zephyr/linker/
Dlinker-devnull.h4 * SPDX-License-Identifier: Apache-2.0
41 /* Determine where to put the devnull region. It should be adjacent to the ROM
42 * region. If ROM starts after RAM or the distance between ROM and RAM is big
43 * enough to fit the devnull region then devnull region is placed just after
44 * the ROM region. If it cannot be done then the devnull region is placed before
45 * the ROM region. It is possible that the devnull region cannot be placed
46 * adjacent to the ROM (e.g. ROM starts at 0 and RAM follows ROM). In that
47 * case compilation fails and the devnull region is not supported in that
53 #define DEVNULL_ADDR (RAM_ADDR - DEVNULL_SIZE)
60 #if ((ROM_ADDR > RAM_ADDR) && ((MAX_ADDR - ROM_END_ADDR) >= DEVNULL_SIZE)) || \
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/Zephyr-latest/include/zephyr/kernel/internal/
Dmm.h4 * SPDX-License-Identifier: Apache-2.0
24 * kernel's permanent mapping of RAM, to obtain its physical address.
41 #define K_MEM_VIRT_OFFSET ((CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_OFFSET) - \
50 * This only works in the kernel's permanent mapping of RAM.
56 #define K_MEM_PHYS_ADDR(virt) ((virt) - K_MEM_VIRT_OFFSET)
61 * This only works in the kernel's permanent mapping of RAM.
89 * This only works in the kernel's permanent mapping of RAM.
117 /* Should be identity-mapped */ in k_mem_phys_addr()
128 "physical address 0x%lx not in RAM", in k_mem_phys_addr()
142 * This only works in the kernel's permanent mapping of RAM.
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/Zephyr-latest/boards/arm/mps2/
Dmps2_an521_cpu1.dts2 * Copyright (c) 2018-2019 Linaro Limited
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <arm/armv8-m.dtsi>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
29 zephyr,shell-uart = &uart0;
30 zephyr,sram = &ram;
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Dmps2_an521_cpu0_ns.dts2 * Copyright (c) 2018-2019 Linaro Limited
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <arm/armv8-m.dtsi>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
29 zephyr,shell-uart = &uart0;
30 zephyr,sram = &ram;
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/Zephyr-latest/soc/nxp/common/
DKconfig.rom_loader2 # SPDX-License-Identifier: Apache-2.0
5 bool "Create output image that NXP ROM can load from FlexSPI to ram"
10 FlexSPI boot device into RAM region. The image will be loaded
11 from FLEXSPI into the region specified by `zephyr,flash` node.
19 default "$(FLEXSPI_BASE) - $(FLASH_BASE)"
/Zephyr-latest/include/zephyr/arch/x86/
Dmemory.ld2 * Copyright (c) 2011-2014, Wind River Systems, Inc.
3 * Copyright (c) 2019-2020 Intel Corp.
5 * SPDX-License-Identifier: Apache-2.0
12 * are in RAM.
14 * If CONFIG_XIP is enabled, then another MEMORY region is declared for ROM,
17 * in RAM and are copied from flash at boot. Text/rodata linked in-place in
20 * If CONFIG_MMU is enabled, then the ROM region in MEMORY is used to set the
23 * Setting LMAs here helps let QEMU or any other ELF-aware loader know where to
34 /* Bounds of physical RAM from DTS */
39 * the same as its physical location, although an identity mapping for RAM
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/Zephyr-latest/boards/snps/em_starterkit/
Darc_mpu_regions.c4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/linker/linker-defs.h>
17 /* Region ICCM */
24 /* Region DCCM */
32 /* Region XCCM */
39 /* Region YCCM */
47 /* Region DDR RAM */
48 MPU_REGION_ENTRY("DDR RAM",
56 * Region peripheral is shared by secure world and normal world by default,
61 /* Region Peripheral */
/Zephyr-latest/kernel/
DKconfig.vm3 # SPDX-License-Identifier: Apache-2.0
23 address from DTS, in which case RAM will be identity-mapped. Some
24 architectures may require RAM to be mapped in this way; they may have
25 just one RAM region and doing this makes linking much simpler, as
26 at least when the kernel boots all virtual RAM addresses are the same
28 this for non-pinned page frames).
30 Otherwise, if RAM isn't identity-mapped:
35 the kernel's address space, such as not overlapping physical RAM
36 regions if RAM is not identity-mapped, or the virtual and physical
38 double-linking of paging structures to make the instruction pointer
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/Zephyr-latest/samples/subsys/fs/fs_sample/boards/
Dnrf52840dk_nrf52840_ram_disk_region.overlay4 * SPDX-License-Identifier: Apache-2.0
8 * of RAM there is. We need some for the Disk, so we need to
11 /delete-node/ &sram0;
25 compatible = "mmio-sram";
28 /* The second one is 64kiB region taken out of SRAM,
33 compatible = "mmio-sram";
40 compatible = "zephyr,ram-disk";
44 disk-name = "SD";
48 sector-size = <512>;
49 sector-count = <128>;
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/Zephyr-latest/samples/boards/nordic/system_off/boards/
Dnrf52840dk_nrf52840.overlay3 compatible = "zephyr,memory-region", "mmio-sram";
5 zephyr,memory-region = "RetainedMem";
9 compatible = "zephyr,retained-ram";
20 /* Shrink SRAM size to avoid overlap with retained memory region */
Dnrf52dk_nrf52832.overlay3 compatible = "zephyr,memory-region", "mmio-sram";
5 zephyr,memory-region = "RetainedMem";
9 compatible = "zephyr,retained-ram";
20 /* Shrink SRAM size to avoid overlap with retained memory region */
Dnrf54l15dk_nrf54l15_cpuapp.overlay3 compatible = "zephyr,memory-region", "mmio-sram";
5 zephyr,memory-region = "RetainedMem";
9 compatible = "zephyr,retained-ram";
20 /* Shrink SRAM size to avoid overlap with retained memory region */
/Zephyr-latest/boards/snps/nsim/arc_classic/
Darc_mpu_regions.c4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/linker/linker-defs.h>
19 /* Region Coverage */
28 /* Region ICCM */
35 /* Region DCCM */
42 /* Region XCCM */
49 /* Region YCCM */
60 /* Region RAM */
61 MPU_REGION_ENTRY("RAM",
79 /* Region FLASH */
[all …]
/Zephyr-latest/tests/drivers/uart/uart_async_api/boards/
Dnucleo_f746zg_nocachemem.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
10 /* The async_api.nocache_mem_dt test case expects a non-cachable RAM region */
12 compatible = "zephyr,memory-region", "mmio-sram";
14 zephyr,memory-region = "RAM_NOCACHE";
15 zephyr,memory-attr = <DT_MEM_ARM_MPU_RAM_NOCACHE>;
/Zephyr-latest/boards/arm/mps3/
Dmps3_corstone300_an547_ns.dts2 * Copyright (c) 2018-2021 Linaro Limited
3 * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <arm/armv8.1-m.dtsi>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
17 compatible = "arm,mps3-an547";
18 #address-cells = <1>;
19 #size-cells = <1>;
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Dmps3_corstone300_an552_ns.dts2 * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <arm/armv8.1-m.dtsi>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "arm,mps3-an552";
17 #address-cells = <1>;
18 #size-cells = <1>;
22 zephyr,shell-uart = &uart0;
[all …]
Dmps3_corstone300_fvp_ns.dts2 * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <arm/armv8.1-m.dtsi>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "arm,mps3-fvp";
17 #address-cells = <1>;
18 #size-cells = <1>;
22 zephyr,shell-uart = &uart0;
[all …]
Dmps3_corstone310_an555_ns.dts2 * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <arm/armv8.1-m.dtsi>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "arm,mps3-an555";
17 #address-cells = <1>;
18 #size-cells = <1>;
22 zephyr,shell-uart = &uart0;
[all …]
Dmps3_corstone310_fvp_ns.dts2 * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <arm/armv8.1-m.dtsi>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "arm,mps3-fvp";
17 #address-cells = <1>;
18 #size-cells = <1>;
22 zephyr,shell-uart = &uart0;
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