Searched +full:gpio +full:- +full:cells (Results 1 – 25 of 1006) sorted by relevance
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/Zephyr-latest/tests/drivers/build_all/gpio/ |
D | app.overlay | 4 * SPDX-License-Identifier: Apache-2.0 9 * with real-world devicetree nodes, to allow these tests to run on 15 #address-cells = <1>; 16 #size-cells = <1>; 18 test_gpio: gpio@deadbeef { 19 compatible = "vnd,gpio"; 20 gpio-controller; 22 #gpio-cells = <0x2>; 26 test_gpio_dw: gpio@c0ffee { 27 compatible = "snps,designware-gpio"; [all …]
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D | adc_lmp90xxx_gpio.overlay | 4 * SPDX-License-Identifier: Apache-2.0 9 #address-cells = <1>; 10 #size-cells = <1>; 12 test_gpio: gpio@deadbeef { 13 compatible = "vnd,gpio"; 14 gpio-controller; 16 #gpio-cells = <0x2>; 21 #address-cells = <1>; 22 #size-cells = <0>; 26 clock-frequency = <2000000>; [all …]
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/Zephyr-latest/dts/arm/infineon/cat1a/psoc6_04/ |
D | psoc6_04.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "arm,cortex-m0+"; 22 compatible = "arm,cortex-m4f"; 27 flash-controller@40240000 { 28 compatible = "infineon,cat1-flash-controller"; 30 #address-cells = <1>; 31 #size-cells = <1>; 34 compatible = "soc-nv-flash"; [all …]
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/Zephyr-latest/dts/arm/infineon/cat1a/legacy/ |
D | psoc6.dtsi | 3 * Copyright (c) 2020-2021, ATL Electronics 5 * SPDX-License-Identifier: Apache-2.0 9 #include <zephyr/dt-bindings/gpio/gpio.h> 11 #include "psoc6-pinctrl.dtsi" 15 #address-cells = <1>; 16 #size-cells = <0>; 20 compatible = "arm,cortex-m0+"; 25 compatible = "arm,cortex-m4f"; 30 flash-controller@40250000 { 31 compatible = "cypress,psoc6-flash-controller"; [all …]
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/Zephyr-latest/dts/arm/infineon/cat1a/psoc6_03/ |
D | psoc6_03.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "arm,cortex-m0+"; 22 compatible = "arm,cortex-m4f"; 27 flash-controller@40240000 { 28 compatible = "infineon,cat1-flash-controller"; 30 #address-cells = <1>; 31 #size-cells = <1>; 34 compatible = "soc-nv-flash"; [all …]
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/Zephyr-latest/dts/x86/intel/ |
D | gpio_common.dtsi | 3 * SPDX-License-Identifier: Apache-2.0 7 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h> 8 #include <zephyr/dt-bindings/acpi/acpi.h> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 14 compatible = "intel,gpio"; 15 interrupt-parent = <&intc>; 17 gpio-controller; 18 #gpio-cells = <2>; 23 compatible = "intel,gpio"; 24 interrupt-parent = <&intc>; [all …]
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D | raptor_lake_p.dtsi | 3 * SPDX-License-Identifier: Apache-2.0 7 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h> 8 #include <zephyr/dt-bindings/pcie/pcie.h> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 14 #address-cells = <1>; 15 #size-cells = <0>; 18 compatible = "intel,raptor-lake", "intel,x86_64"; 20 d-cache-line-size = <64>; 33 interrupt-controller; [all …]
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D | raptor_lake_s.dtsi | 3 * SPDX-License-Identifier: Apache-2.0 7 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h> 8 #include <zephyr/dt-bindings/i2c/i2c.h> 9 #include <zephyr/dt-bindings/pcie/pcie.h> 10 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #address-cells = <1>; 15 #size-cells = <0>; 19 compatible = "intel,raptor-lake", "intel,x86_64"; 20 d-cache-line-size = <64>; 33 #address-cells = <1>; [all …]
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D | elkhart_lake.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h> 9 #include <zephyr/dt-bindings/i2c/i2c.h> 10 #include <zephyr/dt-bindings/pcie/pcie.h> 14 #address-cells = <1>; 15 #size-cells = <0>; 19 compatible = "intel,elkhart-lake", "intel,x86_64"; 20 d-cache-line-size = <64>; 38 #address-cells = <1>; 39 #interrupt-cells = <3>; [all …]
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/Zephyr-latest/dts/arm/renesas/rz/rzg/ |
D | r9a08g045.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv8-m.dtsi> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-m33"; 23 clock-frequency = <250000000>; 24 #address-cells = <1>; 25 #size-cells = <1>; [all …]
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/Zephyr-latest/dts/bindings/gpio/ |
D | nuvoton,nct38xx-gpio.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Nuvoton NCT38XX series I2C-based GPIO expander 7 This must be a child of the NCT38xx multi-function device. 15 nct3807-gpio { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 compatible = "nuvoton,nct38xx-gpio"; 20 gpio@0 { 21 compatible = "nuvoton,nct38xx-gpio-port"; 23 gpio-controller; [all …]
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/Zephyr-latest/dts/arm64/broadcom/ |
D | bcm2712.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm64/armv8-a.dtsi> 8 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "arm,cortex-a76"; 22 interrupt-parent = <&gic>; 25 compatible = "arm,armv8-timer"; 37 #address-cells = <2>; 38 #size-cells = <1>; [all …]
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/Zephyr-latest/boards/arm/mps3/ |
D | mps3_common_soc_peripheral.dtsi | 2 * Copyright (c) 2019-2021 Linaro Limited 3 * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com> 5 * SPDX-License-Identifier: Apache-2.0 8 sysclk: system-clock { 9 compatible = "fixed-clock"; 10 clock-frequency = <25000000>; 11 #clock-cells = <0>; 14 gpio0: gpio@1100000 { 15 compatible = "arm,cmsdk-gpio"; 18 gpio-controller; [all …]
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/Zephyr-latest/tests/drivers/gpio/gpio_reserved_ranges/boards/ |
D | native_posix.overlay | 4 * SPDX-License-Identifier: Apache-2.0 9 compatible = "test-gpio-reserved-ranges"; 11 #address-cells = <1>; 12 #size-cells = <1>; 14 test_gpio_1: gpio@deadbeef { 15 compatible = "vnd,gpio-device"; 16 gpio-controller; 18 #gpio-cells = < 0x2 >; 21 gpio-reserved-ranges = <0 4>, <5 3>, <9 5>, <11 2>, 26 test_gpio_2: gpio@abcd1234 { [all …]
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/Zephyr-latest/dts/arm/silabs/ |
D | efm32hg.dtsi | 1 /* SPDX-License-Identifier: Apache-2.0 */ 3 #include <arm/armv6-m.dtsi> 4 #include <zephyr/dt-bindings/gpio/gpio.h> 5 #include <zephyr/dt-bindings/i2c/i2c.h> 10 zephyr,flash-controller = &msc; 14 #address-cells = <1>; 15 #size-cells = <0>; 18 compatible = "arm,cortex-m0+"; 24 compatible = "mmio-sram"; 28 msc: flash-controller@400c0000 { [all …]
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D | efm32_jg_pg_12b.dtsi | 4 * Copyright (c) 2021 T-Mobile USA, Inc. 6 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/adc/adc.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 19 zephyr,flash-controller = &msc; 23 #address-cells = <1>; 24 #size-cells = <0>; [all …]
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D | efr32fg1p.dtsi | 1 /* SPDX-License-Identifier: Apache-2.0 */ 3 #include <arm/armv7-m.dtsi> 4 #include <zephyr/dt-bindings/gpio/gpio.h> 5 #include <zephyr/dt-bindings/i2c/i2c.h> 7 #include <zephyr/dt-bindings/pwm/pwm.h> 11 zephyr,flash-controller = &msc; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-m4f"; 25 compatible = "mmio-sram"; [all …]
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D | sim3u.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <dt-bindings/gpio/gpio.h> 13 zephyr,flash-controller = &flash; 17 #address-cells = <1>; 18 #size-cells = <0>; 21 compatible = "arm,cortex-m3"; 23 clock-frequency = <20000000>; 29 compatible = "mmio-sram"; 33 compatible = "silabs,si32-pinctrl"; [all …]
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/Zephyr-latest/dts/arm/ti/ |
D | lm3s6965.dtsi | 1 /* SPDX-License-Identifier: Apache-2.0 */ 3 #include <arm/armv7-m.dtsi> 7 #address-cells = <1>; 8 #size-cells = <0>; 12 compatible = "arm,cortex-m3"; 18 compatible = "mmio-sram"; 22 sysclk: system-clock { 23 compatible = "fixed-clock"; 24 clock-frequency = <12000000>; 25 #clock-cells = <0>; [all …]
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/Zephyr-latest/dts/arc/synopsys/ |
D | emsk.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/i2c/i2c.h> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 15 #address-cells = <1>; 16 #size-cells = <0>; 25 intc: arcv2-intc { 26 compatible = "snps,arcv2-intc"; 27 interrupt-controller; 28 #interrupt-cells = <2>; 32 compatible = "snps,arc-timer"; [all …]
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/Zephyr-latest/dts/riscv/wch/ |
D | ch32v00x.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 9 #include <zephyr/dt-bindings/gpio/gpio.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/clock/ch32v00x-clocks.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "wch,qingke-v2"; 25 clock-frequency = <DT_FREQ_M(48)>; [all …]
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/Zephyr-latest/dts/arm/nuvoton/npcx/ |
D | npcx.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/adc/adc.h> 11 #include <zephyr/dt-bindings/clock/npcx_clock.h> 12 #include <zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/i2c/i2c.h> 15 #include <zephyr/dt-bindings/pinctrl/npcx-pinctrl.h> 16 #include <zephyr/dt-bindings/pwm/pwm.h> 17 #include <zephyr/dt-bindings/sensor/npcx_tach.h> [all …]
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/Zephyr-latest/dts/riscv/telink/ |
D | telink_b91.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <zephyr/dt-bindings/adc/adc.h> 10 #include <zephyr/dt-bindings/adc/b91-adc.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 20 #address-cells = <1>; [all …]
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/Zephyr-latest/boards/arm/mps2/ |
D | mps2_an385.dts | 1 /* SPDX-License-Identifier: Apache-2.0 */ 3 /dts-v1/; 5 #include <arm/armv7-m.dtsi> 6 #include <zephyr/dt-bindings/i2c/i2c.h> 7 #include <zephyr/dt-bindings/input/input-event-codes.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 24 zephyr,shell-uart = &uart0; 25 zephyr,uart-pipe = &uart1; 31 compatible = "gpio-leds"; [all …]
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/Zephyr-latest/dts/arm/infineon/cat1a/psoc6_02/ |
D | psoc6_02.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "arm,cortex-m0+"; 22 compatible = "arm,cortex-m4f"; 27 flash-controller@40240000 { 28 compatible = "infineon,cat1-flash-controller"; 30 #address-cells = <1>; 31 #size-cells = <1>; 34 compatible = "soc-nv-flash"; [all …]
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