Lines Matching +full:gpio +full:- +full:cells
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <dt-bindings/gpio/gpio.h>
13 zephyr,flash-controller = &flash;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-m3";
23 clock-frequency = <20000000>;
29 compatible = "mmio-sram";
33 compatible = "silabs,si32-pinctrl";
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "silabs,si32-pll";
43 #clock-cells = <0>;
48 clk_ahb: clk-ahb {
49 compatible = "silabs,si32-ahb";
50 #clock-cells = <0>;
54 clk_apb: clk-apb {
55 compatible = "silabs,si32-apb";
56 #clock-cells = <0>;
64 dma: dma-controller@40036000 {
65 compatible = "silabs,si32-dma";
71 dma-channels = <16>;
72 #dma-cells = <3>;
77 compatible = "silabs,si32-aes";
83 dma-names = "tx", "rx", "xor";
87 flash: flash-controller@4002e000 {
88 compatible = "silabs,si32-flash-controller";
91 #address-cells = <1>;
92 #size-cells = <1>;
95 compatible = "soc-nv-flash";
96 write-block-size = <2>;
101 compatible = "silabs,si32-usart";
109 compatible = "silabs,si32-usart";
116 gpio0: gpio@4002a0a0 {
117 compatible = "silabs,si32-gpio";
118 gpio-controller;
119 #gpio-cells = <2>;
123 gpio1: gpio@4002a140 {
124 compatible = "silabs,si32-gpio";
125 gpio-controller;
126 #gpio-cells = <2>;
130 gpio2: gpio@4002a1e0 {
131 compatible = "silabs,si32-gpio";
132 gpio-controller;
133 #gpio-cells = <2>;
137 gpio3: gpio@4002a320 {
138 compatible = "silabs,si32-gpio";
139 gpio-controller;
140 #gpio-cells = <2>;
147 arm,num-irq-priority-bits = <4>;