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Searched +full:fifo +full:- +full:threshold (Results 1 – 25 of 70) sorted by relevance

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/Zephyr-latest/dts/bindings/dma/
Dgd,gd32-dma-v1.yaml2 # SPDX-License-Identifier: Apache-2.0
5 GD32 DMA controller with FIFO
12 - bit 6-7: Direction (see dma.h)
13 - 0x0: MEMORY to MEMORY
14 - 0x1: MEMORY to PERIPH
15 - 0x2: PERIPH to MEMORY
16 - 0x3: reserved for PERIPH to PERIPH
18 - bit 9: Peripheral address increase
19 - 0x0: no address increment between transfers
20 - 0x1: increment address between transfers
[all …]
Dst,stm32-dma-v1.yaml2 # SPDX-License-Identifier: Apache-2.0
8 This DMA controller includes FIFO control registers.
10 described in the dma.txt file, using a four-cell specifier for each
12 1. channel: the dma stream from 0 to <dma-requests>
14 this value is 0 for Memory-to-memory transfers
15 or a value between <1> .. <dma-generators> (not supported yet)
16 or a value between <dma-generators>+1 .. <dma-generators>+<dma-requests>
17 3. channel-config: A 32bit mask specifying the DMA channel configuration
19 -bit 6-7 : Direction (see dma.h)
24 -bit 9 : Peripheral Increment Address
[all …]
/Zephyr-latest/drivers/serial/
DKconfig.sifive3 # Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
4 # SPDX-License-Identifier: Apache-2.0
16 # ---------- Port 0 ----------
26 int "Port 0 RX Interrupt Threshold Count"
30 Port 0 RX Threshold at which the RX FIFO interrupt triggers.
33 int "Port 0 TX Interrupt Threshold Count"
37 Port 0 TX Threshold at which the TX FIFO interrupt triggers.
39 # ---------- Port 1 ----------
49 int "Port 0 RX Interrupt Threshold Count"
53 Port 1 RX Threshold at which the RX FIFO interrupt triggers.
[all …]
DKconfig.esp321 # SPDX-License-Identifier: Apache-2.0
16 bool "ESP32 built-in USB serial driver"
22 Enable the built-in USB serial interface present in some Espressif
23 MCUs like ESP32-Cx.
26 (USB_SERIAL_JTAG), which acts as a CDC-ACM interface towards the
32 hex "ESP32 UART TX FIFO Threshold"
37 Configure the TX FIFO threshold for ESP32 UART driver.
40 hex "ESP32 UART RX FIFO Threshold"
45 Configure the RX FIFO threshold for ESP32 UART driver.
/Zephyr-latest/dts/bindings/usb/
Drenesas,smartbond-usbd.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,smartbond-usbd"
8 include: usb-ep.yaml
11 dma-min-transfer-size:
16 ep-out-buf-size:
20 Buffer size for OUT end points 0-3.
22 fifo-read-threshold:
25 RX FIFO is 64 bytes. When endpoint size is greater then 64,
26 FIFO warning interrupt is enabled to allow read incoming data
30 possible and when FIFO is hardly filled exit interrupt handler
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/Zephyr-latest/samples/drivers/spi_flash/boards/
Dstm32h735g_disco.overlay4 * SPDX-License-Identifier: Apache-2.0
8 dmas = <&dma1 1 0x16 0x480>; /* request for OCTOSPI1 fifo THreshold */
9 dma-names = "tx_rx";
/Zephyr-latest/drivers/sensor/adi/adxl372/
Dadxl372.h4 * SPDX-License-Identifier: Apache-2.0
40 #define ADXL372_FIFO_ENTRIES_2 0x06u /* Valid data samples in the FIFO */
41 #define ADXL372_FIFO_ENTRIES_1 0x07u /* Valid data samples in the FIFO */
42 #define ADXL372_X_DATA_H 0x08u /* X-axis acceleration data [11:4] */
43 #define ADXL372_X_DATA_L 0x09u /* X-axis acceleration data [3:0] */
44 #define ADXL372_Y_DATA_H 0x0Au /* Y-axis acceleration data [11:4] */
45 #define ADXL372_Y_DATA_L 0x0Bu /* Y-axis acceleration data [3:0] */
46 #define ADXL372_Z_DATA_H 0x0Cu /* Z-axis acceleration data [11:4] */
47 #define ADXL372_Z_DATA_L 0x0Du /* Z-axis acceleration data [3:0] */
48 #define ADXL372_X_MAXPEAK_H 0x15u /* X-axis MaxPeak acceleration data */
[all …]
DKconfig1 # Micropower, 3-Axis, +/-200g Digital Accelerometer
4 # SPDX-License-Identifier: Apache-2.0
7 bool "ADXL372 Three Axis High-g I2C/SPI accelerometer"
14 Enable driver for ADXL372 Three-Axis Digital Accelerometers.
25 In most high-g applications, a single (3-axis) acceleration sample at
28 In this mode the device returns only the over threshold
40 int "Activity threshold in mg"
44 Threshold for activity detection.
47 int "In-activity threshold in mg"
51 Threshold for in-activity detection.
[all …]
Dadxl372.c4 * SPDX-License-Identifier: Apache-2.0
24 * Set the threshold for activity detection for a single axis
25 * @param dev - The device structure.
26 * @param axis_reg_h - The high part of the activity register.
27 * @param act - The activity config structure.
36 struct adxl372_data *data = dev->data; in adxl372_set_activity_threshold()
38 ret = data->hw_tf->write_reg(dev, axis_reg_h++, act->thresh >> 3); in adxl372_set_activity_threshold()
47 val = (act->thresh << 5) | (act->referenced << 1) | act->enable; in adxl372_set_activity_threshold()
50 val = (act->thresh << 5) | act->enable; in adxl372_set_activity_threshold()
53 return data->hw_tf->write_reg(dev, axis_reg_h, val); in adxl372_set_activity_threshold()
[all …]
/Zephyr-latest/drivers/sensor/adi/adxl367/
DKconfig1 # Micropower, 3-Axis, +/-200g Digital Accelerometer
4 # SPDX-License-Identifier: Apache-2.0
7 bool "ADXL367 Three Axis High-g I2C/SPI accelerometer"
15 Enable driver for ADXL367 Three-Axis Digital Accelerometers.
32 int "Activity threshold in raw value"
36 Threshold for activity detection.
39 int "In-activity threshold in raw value"
43 Threshold for in-activity detection.
57 int "In-activity time"
62 threshold for an inactivity event to be detected. Value is the
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Dadxl367.h4 * SPDX-License-Identifier: Apache-2.0
57 #define ADXL367_XDATA 0x08u /* X-axis acceleration data [13:6] */
58 #define ADXL367_YDATA 0x09u /* Y-axis acceleration data [13:6] */
59 #define ADXL367_ZDATA 0x0Au /* Z-axis acceleration data [13:6] */
61 #define ADXL367_FIFO_ENTRIES_L 0x0Cu /* FIFO Entries Low */
62 #define ADXL367_FIFO_ENTRIES_H 0x0Du /* FIFO Entries High */
63 #define ADXL367_X_DATA_H 0x0Eu /* X-axis acceleration data [13:6] */
64 #define ADXL367_X_DATA_L 0x0Fu /* X-axis acceleration data [5:0] */
65 #define ADXL367_Y_DATA_H 0x10u /* Y-axis acceleration data [13:6] */
66 #define ADXL367_Y_DATA_L 0x11u /* Y-axis acceleration data [5:0] */
[all …]
Dadxl367.c4 * SPDX-License-Identifier: Apache-2.0
29 * @param dev - The device structure.
30 * @param th - Structure holding the activity threshold information:
33 * Set Threshold value
39 struct adxl367_data *data = dev->data; in adxl367_setup_activity_detection()
43 ret = data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL, in adxl367_setup_activity_detection()
46 FIELD_PREP(ADXL367_ACT_INACT_CTL_ACT_EN_MSK, th->enable) | in adxl367_setup_activity_detection()
48 th->referenced)); in adxl367_setup_activity_detection()
53 ret = data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_H, ADXL367_THRESH_H_MSK, in adxl367_setup_activity_detection()
54 FIELD_PREP(ADXL367_THRESH_H_MSK, th->value >> 6)); in adxl367_setup_activity_detection()
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/Zephyr-latest/drivers/sensor/adi/adxl362/
DKconfig1 # ADXL362 Three-Axis Digital Accelerometers
4 # SPDX-License-Identifier: Apache-2.0
13 Enable driver for ADXL362 Three-Axis Digital Accelerometers.
74 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_ADI_ADXL362),int1-gpios)
80 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_ADI_ADXL362),int1-gpios)
86 bool "Use FIFO to stream data"
112 int "Upper threshold value"
119 int "Upper threshold time"
126 int "Lower threshold value"
133 int "Lower threshold time"
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Dadxl362.c1 /* adxl362.c - ADXL362 Three-Axis Digital Accelerometers */
6 * SPDX-License-Identifier: Apache-2.0
29 const struct adxl362_config *cfg = dev->config; in adxl362_reg_access()
53 return spi_transceive_dt(&cfg->bus, &tx, &rx); in adxl362_reg_access()
58 return spi_write_dt(&cfg->bus, &tx); in adxl362_reg_access()
162 return -EINVAL; in adxl362_freq_to_odr_val()
173 return -EINVAL; in adxl362_freq_to_odr_val()
197 return -EINVAL; in adxl362_range_to_reg_val()
203 struct adxl362_data *adxl362_data = dev->data; in adxl362_set_range()
220 adxl362_data->selected_range = range; in adxl362_set_range()
[all …]
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
Ddmic_regs.h1 /* SPDX-License-Identifier: Apache-2.0 */
65 /* Common FIFO channels register (primary & secondary) (0000 - 0FFF)
72 /* Status Register for FIFO interface */
75 /* Data read/Write port for FIFO */
79 * (crossed out) 0010h LOCAL_TSC0 64-bit Wall Clock timestamp
80 * (crossed out) 0018h LOCAL_SAMPLE0 64-bit Sample Count
81 * 001Ch - 00FFh Reserved space for extensions
151 /* Threshold Interrupt Enable */
157 /* FIFO Initialize (FINIT): The software will set this bit to immediately clear FIFO pointers. */
163 /* Burst FIFO Threshold */
[all …]
/Zephyr-latest/soc/intel/intel_adsp/ace/include/
Ddmic_regs.h1 /* SPDX-License-Identifier: Apache-2.0 */
42 /* Capture Link Select - select which link wall clock to time stamp. */
68 /* Common FIFO channels register (primary & secondary) (0000 - 0FFF)
75 /* Status Register for FIFO interface */
78 /* Data read/Write port for FIFO */
82 * (crossed out) 0010h LOCAL_TSC0 64-bit Wall Clock timestamp
83 * (crossed out) 0018h LOCAL_SAMPLE0 64-bit Sample Count
84 * 001Ch - 00FFh Reserved space for extensions
154 /* Threshold Interrupt Enable */
160 /* FIFO Initialize (FINIT): The software will set this bit to immediately clear FIFO pointers. */
[all …]
/Zephyr-latest/dts/bindings/sensor/
Dst,lis2dw12-common.yaml2 # SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/sensor/lis2dw12.h>
14 wakeup-duration = <LIS2DW12_DT_WAKEUP_4_ODR>;
15 ff-threshold = <LIS2DW12_DT_FF_THRESHOLD_500_mg>;
16 tap-mode = <LIS2DW12_DT_SINGLE_DOUBLE_TAP>;
17 power-mode = <LIS2DW12_DT_HP_MODE>;
18 bw-filt = <LIS2DW12_DT_FILTER_BW_ODR_DIV_2>;
21 include: sensor-device.yaml
24 irq-gpios:
25 type: phandle-array
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Dst,lsm6dsv16x-common.yaml2 # SPDX-License-Identifier: Apache-2.0
5 When setting the accel-range, accel-odr, gyro-range, gyro-odr properties in
10 #include <zephyr/dt-bindings/sensor/lsm6dsv16x.h>
15 accel-range = <LSM6DSV16X_DT_FS_8G>;
16 accel-odr = <LSM6DSV16X_DT_ODR_AT_60Hz>;
17 gyro-range = <LSM6DSV16X_DT_FS_4000DPS>;
18 gyro-odr = <LSM6DSV16X_DT_ODR_AT_60Hz>;
21 include: sensor-device.yaml
24 int1-gpios:
25 type: phandle-array
[all …]
/Zephyr-latest/dts/bindings/serial/
Dst,stm32-uart-base.yaml2 # SPDX-License-Identifier: Apache-2.0
5 description: STM32 UART-BASE
8 - name: uart-controller.yaml
9 property-blocklist:
10 - clock-frequency
11 - name: pinctrl-device.yaml
12 - name: reset-device.yaml
13 - name: uart-controller-pin-inversion.yaml
28 single-wire:
31 Enable the single wire half-duplex communication.
[all …]
/Zephyr-latest/drivers/entropy/
Dentropy_smartbond.c4 * SPDX-License-Identifier: Apache-2.0
30 uint8_t threshold; member
37 (CONFIG_ENTROPY_SMARTBOND_ISR_POOL_SIZE - 1)) == 0,
41 (CONFIG_ENTROPY_SMARTBOND_THR_POOL_SIZE - 1)) == 0,
54 /* TRNG FIFO definitions are not in DA1469x.h */
86 CRG_TOP->CLK_AMBA_REG |= CRG_TOP_CLK_AMBA_REG_TRNG_CLK_ENABLE_Msk; in trng_enable()
87 TRNG->TRNG_CTRL_REG = TRNG_TRNG_CTRL_REG_TRNG_ENABLE_Msk; in trng_enable()
95 CRG_TOP->CLK_AMBA_REG &= ~CRG_TOP_CLK_AMBA_REG_TRNG_CLK_ENABLE_Msk; in trng_enable()
96 TRNG->TRNG_CTRL_REG = 0; in trng_enable()
106 return TRNG->TRNG_FIFOLVL_REG & FIFO_COUNT_MASK; in trng_available()
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/Zephyr-latest/dts/bindings/ethernet/
Dsnps,dwcxgmac.yaml2 # SPDX - License - Identifier : Apache - 2.0
9 - name: reset-device.yaml
10 - name: ethernet-controller.yaml
17 max-frame-size:
23 means that normally xgmac will reject any frame above max-frame-size
27 max-speed:
30 - 10
31 - 100
32 - 1000
33 - 2500
[all …]
/Zephyr-latest/drivers/sensor/st/lsm6dsv16x/
Dlsm6dsv16x_rtio_stream.c1 /* ST Microelectronics LSM6DSV16X 6-axis IMU sensor driver
6 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/sensor/lsm6dsv16x.h>
25 struct lsm6dsv16x_data *lsm6dsv16x = dev->data; in lsm6dsv16x_config_fifo()
26 const struct lsm6dsv16x_config *config = dev->config; in lsm6dsv16x_config_fifo()
27 stmdev_ctx_t *ctx = (stmdev_ctx_t *)&config->ctx; in lsm6dsv16x_config_fifo()
37 /* disable FIFO as first thing */ in lsm6dsv16x_config_fifo()
47 xl_batch = config->accel_batch; in lsm6dsv16x_config_fifo()
48 gy_batch = config->gyro_batch; in lsm6dsv16x_config_fifo()
49 temp_batch = config->temp_batch; in lsm6dsv16x_config_fifo()
[all …]
/Zephyr-latest/drivers/dai/intel/ssp/
Ddai-params-intel-ipc4.h4 * SPDX-License-Identifier: Apache-2.0
19 /**< HD/A host output (-> DSP). */
21 /**< HD/A host input (<- DSP). */
26 /**< HD/A link output (DSP ->). */
28 /**< HD/A link input (DSP <-). */
33 /**< DMIC link input (DSP <-). */
36 /**< I2S link output (DSP ->). */
38 /**< I2S link input (DSP <-). */
41 /**< ALH link output, legacy for SNDW (DSP ->). */
43 /**< ALH link input, legacy for SNDW (DSP <-). */
[all …]
/Zephyr-latest/drivers/sensor/tdk/icm42688/
Dicm42688_rtio_stream.c4 * SPDX-License-Identifier: Apache-2.0
18 const struct sensor_read_config *cfg = iodev_sqe->sqe.iodev->data; in icm42688_submit_stream()
19 struct icm42688_dev_data *data = sensor->data; in icm42688_submit_stream()
20 struct icm42688_cfg new_config = data->cfg; in icm42688_submit_stream()
25 for (int i = 0; i < cfg->count; ++i) { in icm42688_submit_stream()
26 switch (cfg->triggers[i].trigger) { in icm42688_submit_stream()
37 LOG_DBG("Trigger (%d) not supported", cfg->triggers[i].trigger); in icm42688_submit_stream()
38 rtio_iodev_sqe_err(iodev_sqe, -ENOTSUP); in icm42688_submit_stream()
43 if (new_config.interrupt1_drdy != data->cfg.interrupt1_drdy || in icm42688_submit_stream()
44 new_config.interrupt1_fifo_ths != data->cfg.interrupt1_fifo_ths || in icm42688_submit_stream()
[all …]
/Zephyr-latest/drivers/i2c/
Di2c_bcm_iproc.c5 * SPDX-License-Identifier: Apache-2.0
20 #include "i2c-priv.h"
123 #define M_RX_FIFO_MAX_THLD_VALUE (TX_RX_FIFO_SIZE - 1)
151 #define DEV_CFG(dev) ((struct iproc_i2c_config *)(dev)->config)
152 #define DEV_DATA(dev) ((struct iproc_i2c_data *)(dev)->data)
153 #define DEV_BASE(dev) ((DEV_CFG(dev))->base)
215 return -EINVAL; in iproc_i2c_target_set_address()
231 struct i2c_target_config *target_config = dd->target_cfg; in iproc_i2c_target_init()
250 ret = iproc_i2c_target_set_address(dev, target_config->address); in iproc_i2c_target_init()
258 /* Enable interrupt register to indicate a valid byte in receive fifo */ in iproc_i2c_target_init()
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