Searched +full:exec +full:- +full:bit +full:- +full:idx (Results 1 – 8 of 8) sorted by relevance
/Zephyr-latest/dts/bindings/mm/ |
D | intel,adsp-tlb.yaml | 3 # SPDX-License-Identifier: Apache-2.0 7 compatible: "intel,adsp-tlb" 15 paddr-size: 20 exec-bit-idx: 22 description: Index of the execute permission bit. 24 write-bit-idx: 26 description: Index of the write permission bit.
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D | intel,adsp-mtl-tlb.yaml | 3 # SPDX-License-Identifier: Apache-2.0 7 compatible: "intel,adsp-mtl-tlb" 15 paddr-size: 20 exec-bit-idx: 22 description: Index of the execute permission bit. 24 write-bit-idx: 26 description: Index of the write permission bit.
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/Zephyr-latest/arch/xtensa/core/ |
D | ptables.c | 3 * SPDX-License-Identifier: Apache-2.0 9 #include <zephyr/linker/linker-defs.h> 23 #define OPTION_NO_TLB_IPI BIT(0) 76 * @note: The first bit is set because it is used for the kernel page tables. 118 * cacheable, read / write and non-executable 151 /* Mark rodata segment cacheable, read only and non-executable */ 163 if ((thread->base.user_options & K_USER) != 0U) { in thread_page_tables_get() 164 return thread->arch.ptables; in thread_page_tables_get() 205 uint16_t idx; in alloc_l2_table() local 207 for (idx = 0; idx < CONFIG_XTENSA_MMU_NUM_L2_TABLES; idx++) { in alloc_l2_table() [all …]
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/Zephyr-latest/dts/xtensa/intel/ |
D | intel_adsp_ace20_lnl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d0i3 &d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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D | intel_adsp_ace15_mtpm.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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D | intel_adsp_ace30_ptl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d0i3 &d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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D | intel_adsp_ace30.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d0i3 &d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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/Zephyr-latest/doc/releases/ |
D | release-notes-3.2.rst | 13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`). 15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`. 31 * CVE-2022-2993: Under embargo until 2022-11-03 33 * CVE-2022-2741: Under embargo until 2022-10-14 56 This definition can be used by third-party code to compile code conditional 58 Therefore, any third-party code integrated using the Zephyr build system will 91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates 129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig 156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and 157 :dtcompatible:`fixed-partitions`. [all …]
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