Searched +full:enable +full:- +full:low +full:- +full:power +full:- +full:32 +full:k (Results 1 – 25 of 30) sorted by relevance
12
| /Zephyr-latest/dts/bindings/pwm/ |
| D | microchip,xec-pwmbbled.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
8 compatible: "microchip,xec-pwmbbled"
27 clock-select:
31 Clock source selection: 32 KHz is available in deep sleep.
32 - PWM_BBLED_CLK_AHB: Clock source is the PLL based AHB clock
33 - PWM_BBLED_CLK_32K: Clock source is the 32KHz domain
35 - "PWM_BBLED_CLK_32K"
36 - "PWM_BBLED_CLK_48M"
38 pinctrl-0:
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| /Zephyr-latest/dts/bindings/clock/ |
| D | microchip,xec-pcr.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Microchip XEC Power Clock Reset and VBAT register (PCR)
6 compatible: "microchip,xec-pcr"
8 include: [clock-controller.yaml, pinctrl-device.yaml, base.yaml]
14 core-clock-div:
17 description: Divide 96 MHz PLL clock to produce Cortex-M4 core clock
19 slow-clock-div:
25 pll-32k-src:
28 description: 32 KHz clock source for PLL
30 periph-32k-src:
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_mchp_xec.c | 4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
30 * 32KHz period counter minimum for pass/fail: 16-bit
31 * 32KHz period counter maximum for pass/fail: 16-bit
32 * 32KHz duty cycle variation max for pass/fail: 16-bit
33 * 32KHz valid count minimum: 8-bit
37 * One 32KHz clock pulse = 1464.84 48 MHz counts.
99 uint32_t RSVD4[(0x00c0 - 0x0094) / 4];
154 #define XEC_CC_VBATR_CS_SO_EN BIT(0) /* enable and start silicon OSC */
155 #define XEC_CC_VBATR_CS_XTAL_EN BIT(8) /* enable & start external crystal */
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| /Zephyr-latest/drivers/ieee802154/ |
| D | ieee802154_dw1000_regs.h | 4 * SPDX-License-Identifier: Apache-2.0
7 * https://github.com/Decawave/mynewt-dw1000-core.git
14 * Copyright (C) 2017-2018, Decawave Limited, All Rights Reserved
24 * http://www.apache.org/licenses/LICENSE-2.0
73 /* Frame Filtering Enable. This bit enables the frame filtering functionality */
75 /* Frame Filtering Behave as a Co-ordinator */
110 /* Disable Smart TX Power control */
114 /* Receive Wait Timeout Enable. */
117 * Receiver Auto-Re-enable.
118 * This bit is used to cause the receiver to re-enable automatically
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| D | ieee802154_dw1000.c | 4 * SPDX-License-Identifier: Apache-2.0
79 uint8_t rx_ns_sfd; /* non-standard SFD */
81 * (tx_shr_nsync + 1 + SFD_length - rx_pac_l)
136 .rx_sfd_to = (129 + 8 - 8),
158 struct dwt_context *ctx = dev->data; in dwt_spi_read()
159 const struct dwt_hi_cfg *hi_cfg = dev->config; in dwt_spi_read()
187 if (spi_transceive(hi_cfg->bus.bus, ctx->spi_cfg, &tx, &rx)) { in dwt_spi_read()
189 return -EIO; in dwt_spi_read()
202 struct dwt_context *ctx = dev->data; in dwt_spi_write()
203 const struct dwt_hi_cfg *hi_cfg = dev->config; in dwt_spi_write()
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| /Zephyr-latest/boards/adi/max32672evkit/doc/ |
| D | index.rst | 6 of the MAX32672 microcontroller, which is a small, high-reliability, ultra-low power,
7 32-bit microcontroller. The MAX32672 is a secure and cost-effective solution
8 for motion/motor control, industrial sensors, and battery-powered medical devices and offers legacy
9 designs an easy, cost-optimal upgrade path from 8-bit or 16-bit microcontrollers.
16 - MAX32672 MCU:
18 - High-Efficiency Microcontroller for Low-Power High-Reliability Devices
20 - Arm Cortex-M4 Processor with FPU up to 100MHz
21 - 1MB Dual-Bank Flash with Error Correction
22 - 200KB SRAM (160KB with ECC Enabled), Optionally Preserved in Lowest Power Modes
23 - EEPROM Emulation on Flash
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| /Zephyr-latest/soc/ite/ec/it8xxx2/ |
| D | soc.c | 4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
26 * This define gets the number of active USB Power Delivery (USB PD)
34 /* PLL Frequency Auto-Calibration Control 0 Register */
44 /* PLL Frequency Auto-Calibration Control 2 Register */
64 pllfreq = MHZ(32); in chip_get_pll_freq()
79 return -ERANGE; in chip_get_pll_freq()
180 /* Enable HW timer to wakeup chip from the sleep mode */ in chip_run_pll_sequence()
191 IT8XXX2_ECPM_PLLFREQR = pll->pll_freq; in chip_run_pll_sequence()
192 /* Pre-set FND clock frequency = PLL / 3 */ in chip_run_pll_sequence()
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| /Zephyr-latest/include/zephyr/net/ |
| D | wifi.h | 5 * SPDX-License-Identifier: Apache-2.0
10 * @brief IEEE 802.11 protocol and general Wi-Fi definitions.
14 * @brief Wi-Fi Management API.
15 * @defgroup wifi_mgmt Wi-Fi Management
45 /** WPA2-PSK security. */
47 /** WPA2-PSK-SHA256 security. */
49 /** WPA3-SAE security. */
51 /** WPA3-SAE security with hunting-and-pecking loop. */
53 /** WPA3-SAE security with hash-to-element. */
55 /** WPA3-SAE security with both hunting-and-pecking loop and hash-to-element enabled. */
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| /Zephyr-latest/boards/nxp/frdm_k82f/doc/ |
| D | index.rst | 6 The FRDM-K82F is a low-cost development platform for Kinetis K80, K81,
9 - Form-factor compatible with the Arduino R3 pin layout
10 - Peripherals enable rapid prototyping, including a six-axis digital
12 tri-colored LED and two user push-buttons for direct interaction, 2x32 Mb
14 with Bluetooth and 2.4 GHz radio add-on modules
15 - OpenSDAv2.1, the NXP open source hardware embedded serial and debug adapter
17 flash programming, and run-control debugging
22 - MK82FN256VLL15 MCU (150 MHz, 256 KB flash memory, 256 KB RAM, low-power,
23 crystal-less USB, and 100 Low profile Quad Flat Package (LQFP))
24 - Dual role USB interface with micro-B USB connector
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| /Zephyr-latest/boards/silabs/radio_boards/slwrb4250b/doc/ |
| D | index.rst | 8 SoC built on an ARM Cortex®-M4F processor with excellent low power capabilities.
10 The BRD4250B a.k.a. SLWRB4250B radio board plugs into the Wireless Starter Kit
16 - EFR32FG1P133F256GM48 Flex Gecko SoC
17 - CPU core: ARM Cortex®-M4 with FPU
18 - Flash memory: 256 kB
19 - RAM: 32 kB
20 - Transmit power: up to +13 dBm
21 - Operation frequency: 2.4 GHz, 868 MHz
22 - 8Mbit SPI NOR Flash
23 - Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
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| /Zephyr-latest/drivers/sensor/ti/bq274xx/ |
| D | bq274xx.c | 4 * SPDX-License-Identifier: Apache-2.0
7 * - BQ27441
8 * Datasheet: https://www.ti.com/lit/gpn/bq27441-g1
10 * - BQ27421
11 * Datasheet: https://www.ti.com/lit/gpn/bq27421-g1
13 * - BQ27427
46 /* Delay from power up or shutdown exit to chip entering active state, this is
47 * defined as 250ms typical in the datasheet (Power-up communication delay).
52 #define BQ27XXX_DM_SZ 32
85 const struct bq274xx_config *config = dev->config; in bq274xx_cmd_reg_read()
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| /Zephyr-latest/drivers/flash/ |
| D | spi_nor.c | 2 * Copyright (c) 2018 Savoir-Faire Linux.
8 * SPDX-License-Identifier: Apache-2.0
30 /* Device Power Management Notes
36 * * Some devices support a Deep Power-Down mode which reduces current
39 * When mapped to the Zephyr Device Power Management states:
41 * * PM_DEVICE_STATE_SUSPENDED corresponds to deep-power-down mode;
63 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config)
66 /* MXICY Low-power/high perf mode is second bit in configuration register 2 */
72 /* Build-time data associated with the device. */
92 /* Expected JEDEC ID, from jedec-id property */
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| /Zephyr-latest/soc/ite/ec/common/ |
| D | chip_chipregs.h | 3 * SPDX-License-Identifier: Apache-2.0
48 /* --- General Control (GCTRL) --- */
52 /* RISC-V JTAG Debug Interface Enable */
54 /* RISC-V JTAG Debug Interface Selection */
67 /* --- External GPIO Control (EGPIO) --- */
265 /* 0x049: PWM Output Open-Drain Enable */
280 /* --- Wake-Up Control (WUC) --- */
284 /* TODO: should a defined interface for configuring wake-up interrupts */
314 /* 0x007: Keyboard Scan In [7:0] GPIO Output Enable */
322 /* 0x00B: Keyboard Scan Out [15:8] GPIO Output Enable */
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| /Zephyr-latest/drivers/dai/intel/ssp/ |
| D | ssp.c | 4 * SPDX-License-Identifier: Apache-2.0
22 #define dai_set_drvdata(dai, data) (dai->priv_data = data)
23 #define dai_get_drvdata(dai) dai->priv_data
24 #define dai_get_plat_data(dai) dai->ssp_plat_data
25 #define dai_get_mn(dai) dai->ssp_plat_data->mn_inst
26 #define dai_get_ftable(dai) dai->ssp_plat_data->ftable
27 #define dai_get_fsources(dai) dai->ssp_plat_data->fsources
28 #define dai_mn_base(dai) dai->ssp_plat_data->mn_inst->base
29 #define dai_base(dai) dai->ssp_plat_data->base
30 #define dai_ip_base(dai) dai->ssp_plat_data->ip_base
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| /Zephyr-latest/kernel/ |
| D | Kconfig | 3 # Copyright (c) 2014-2015 Wind River Systems, Inc.
4 # SPDX-License-Identifier: Apache-2.0
9 module-str = kernel
13 bool "Multi-threading" if ARCH_HAS_SINGLE_THREAD_SUPPORT
35 K_PRIO_COOP(0) to K_PRIO_COOP(CONFIG_NUM_COOP_PRIORITIES - 1)
39 -CONFIG_NUM_COOP_PRIORITIES to -1
58 to priorities 0 to CONFIG_NUM_PREEMPT_PRIORITIES - 1.
71 default -2 if !PREEMPT_ENABLED
85 default -127
92 int "Number of very-high priority 'preemptor' threads"
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| /Zephyr-latest/boards/nxp/hexiwear/doc/ |
| D | index.rst | 9 Hexiwear is powered by a Kinetis K64 microcontroller based on the ARM Cortex-M4
10 core. Another Kinetis wireless MCU, the KW40Z, provides Bluetooth Low Energy
15 - Eye-catching Smart Watch form factor with powerful, low power Kinetis K6x MCU
16 and 6 on-board sensors.
17 - Designed for wearable applications with the onboard rechargeable battery,
20 - Designed for IoT end node applications with the onboard sensor's such as
22 - Flexibility to let you add the sensors of your choice nearly 200 additional
32 - Main MCU: NXP Kinetis K64x (ARM Cortex-M4, 120 MHz, 1M Flash, 256K SRAM)
33 - Wireless MCU: NXP Kinetis KW4x (ARM Cortex-M0+, Bluetooth Low Energy &
35 - 6-axis combo Accelerometer and Magnetometer NXP FXOS8700
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-2.5.rst | 27 * CVE-2021-3323: Under embargo until 2021-04-14
28 * CVE-2021-3321: Under embargo until 2021-04-14
29 * CVE-2021-3320: Under embargo until 2021-04-14
39 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
49 for instance enable bootstrap procedure in the current session.
56 * Changed vcnl4040 dts binding default for property 'proximity-trigger'.
63 * The :c:func:`mqtt_keepalive_time_left` function now returns -1 if keep alive
67 timeout usage must use the new-style k_timeout_t type and not the
84 * A new :ref:`regulator_api` API has been added to support controlling power
87 GPIO-only regulators a devicetree property ``supply-gpios`` is defined as a
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| D | release-notes-3.5.rst | 38 * CVE-2023-3725 `Zephyr project bug tracker GHSA-2g3m-p6c7-8rr3
39 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-2g3m-p6c7-8rr3>`_
41 * CVE-2023-4257 `Zephyr project bug tracker GHSA-853q-q69w-gf5j
42 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-853q-q69w-gf5j>`_
44 * CVE-2023-4258 `Zephyr project bug tracker GHSA-m34c-cp63-rwh7
45 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-m34c-cp63-rwh7>`_
47 * CVE-2023-4259 `Zephyr project bug tracker GHSA-gghm-c696-f4j4
48 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-gghm-c696-f4j4>`_
50 * CVE-2023-4260 `Zephyr project bug tracker GHSA-gj27-862r-55wh
51 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-gj27-862r-55wh>`_
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| D | release-notes-3.7.rst | 10 This release is the last non-maintenance 3.x release and, as such, will be the next
18 * A long-awaited :ref:`HTTP Server <http_server_interface>` library, and associated service API,
21 * :ref:`POSIX support <posix_support>` has been extended, with most Options of the IEEE 1003-2017
25 * Bluetooth Host has been extended with support for the Nordic UART Service (NUS), Hands-free Audio
29 :ref:`read-then-decode approach <sensor-read-and-decode>` that enables more types of sensors and
35 * Trusted Firmware-M (TF-M) 2.1.0 and Mbed TLS 3.6.0 have been integrated into Zephyr.
39 1588) allows to synchronize time across devices with sub-microsecond accuracy.
52 * 1-Wire
71 :ref:`pinctrl-guide` for more details.
88 * CVE-2024-3077 `Zephyr project bug tracker GHSA-gmfv-4vfh-2mh8
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| D | release-notes-3.3.rst | 14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
51 allow disabling sync reports, and enable sync report filtering. these two
56 added to enable the PAST implementation rather than
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
75 standard logging system. To enable debugging for a particular module in the
76 Bluetooth subsystem, enable `CONFIG_BT_(module name)_LOG_LEVEL_DBG` instead of
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| D | release-notes-2.3.rst | 18 with future support for features like 64-bit and absolute timeouts in mind
21 * Zephyr now integrates with the TF-M (Trusted Firmware M) PSA-compliant
23 * The Bluetooth Low Energy Host now supports LE Advertising Extensions
24 * The CMSIS-DSP library is now included and integrated
33 * CVE-2020-10022: UpdateHub Module Copies a Variable-Sized Hash String
34 into a fixed-size array.
35 * CVE-2020-10059: UpdateHub Module Explicitly Disables TLS
37 * CVE-2020-10061: Improper handling of the full-buffer case in the
39 * CVE-2020-10062: Packet length decoding error in MQTT
40 * CVE-2020-10063: Remote Denial of Service in CoAP Option Parsing Due
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| D | release-notes-2.7.rst | 17 * Support for M-Profile Vector Extensions (MVE) on ARMv8.1-M
18 * Improved thread safety for Newlib and C++ on SMP-capable systems
20 * New Action-based Power Management API
23 * Linker Support for Tightly-Coupled Memory in RISC-V
25 * Support for extended PCI / PCIe capabilities, improved MIS-X support
33 * The kernel now supports both 32- and 64-bit architectures
36 * We added support for Point-to-Point Protocol (PPP)
37 * We added support for UpdateHub, an end-to-end solution for over-the-air device updates
38 * We added support for ARM Cortex-R Architecture
40 * Expanded support for ARMv6-M architecture
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| D | release-notes-3.2.rst | 13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`).
15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`.
31 * CVE-2022-2993: Under embargo until 2022-11-03
33 * CVE-2022-2741: Under embargo until 2022-10-14
56 This definition can be used by third-party code to compile code conditional
58 Therefore, any third-party code integrated using the Zephyr build system will
91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates
129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig
156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and
157 :dtcompatible:`fixed-partitions`.
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| /Zephyr-latest/boards/nxp/mimxrt1170_evk/doc/ |
| D | index.rst | 6 The dual core i.MX RT1170 runs on the Cortex-M7 core at 1 GHz and on the Cortex-M4
14 - MIMXRT1176DVMAA MCU
16 - 1GHz Cortex-M7 & 400Mhz Cortex-M4
17 - 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
19 - Memory
21 - 512 Mbit SDRAM
22 - 128 Mbit QSPI Flash
23 - 512 Mbit Octal Flash
24 - 2 Gbit raw NAND flash
25 - 64 Mbit LPSPI flash
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| /Zephyr-latest/drivers/counter/ |
| D | maxim_ds3231.c | 2 * Copyright (c) 2019-2020 Peter Bigot Consulting, LLC
4 * SPDX-License-Identifier: Apache-2.0
33 /* Return lower 32-bits of time as counter value */
107 * such an operation, or when doing a no-notify synchronize
148 struct ds3231_data *data = dev->data; in sc_ctrl()
149 const struct ds3231_config *cfg = dev->config; in sc_ctrl()
150 struct register_map *rp = &data->registers; in sc_ctrl()
151 uint8_t ctrl = (rp->ctrl & ~clear) | set; in sc_ctrl()
154 if (rp->ctrl != ctrl) { in sc_ctrl()
159 rc = i2c_write_dt(&cfg->bus, buf, sizeof(buf)); in sc_ctrl()
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