1.. zephyr:board:: max32672evkit 2 3Overview 4******** 5The MAX32672 evaluation kit (EV kit) provides a platform for evaluating the capabilities 6of the MAX32672 microcontroller, which is a small, high-reliability, ultra-low power, 732-bit microcontroller. The MAX32672 is a secure and cost-effective solution 8for motion/motor control, industrial sensors, and battery-powered medical devices and offers legacy 9designs an easy, cost-optimal upgrade path from 8-bit or 16-bit microcontrollers. 10 11The Zephyr port is running on the MAX32672 MCU. 12 13Hardware 14******** 15 16- MAX32672 MCU: 17 18 - High-Efficiency Microcontroller for Low-Power High-Reliability Devices 19 20 - Arm Cortex-M4 Processor with FPU up to 100MHz 21 - 1MB Dual-Bank Flash with Error Correction 22 - 200KB SRAM (160KB with ECC Enabled), Optionally Preserved in Lowest Power Modes 23 - EEPROM Emulation on Flash 24 - 16KB Unified Cache with ECC 25 - Resource Protection Unit (RPU) and MemoryProtection Unit (MPU) 26 - Dual- or Single-Supply Operation, 1.7V to 3.6V 27 - Wide Operating Temperature: -40°C to +105°C 28 29 - Flexible Clocking Schemes 30 31 - Internal High-Speed 100MHz Oscillator 32 - Internal Low-Power 7.3728MHz and Ultra-Low-Power 80kHz Oscillators 33 - 16MHz–32MHz Oscillator, 32.768kHz Oscillator(External Crystal Required) 34 - External Clock Input for CPU, LPUART, LPTMR 35 36 - Power Management Maximizes Uptime for Battery Applications 37 38 - 59.8μA/MHz ACTIVE at 0.9V up to 12MHz(CoreMark®) 39 - 56.6μA/MHz ACTIVE at 1.1V up to 100MHz(While(1)) 40 - 3.09μA Full Memory Retention Power in BACKUPMode at VDD = 1.8V 41 - 350nA Ultra-Low-Power RTC at 42 - Wake from LPUART or LPTMR 43 44 - Optimal Peripheral Mix Provides Platform Scalability 45 46 - Up to 42 General-Purpose I/O Pins 47 - Up to Three SPI Master/Slave (up to 50Mbps) 48 - Up to Three 4-Wire UART 49 - Up to Three I2C Master/Slave 3.4Mbps High Speed 50 - Up to Four 32-Bit Timers (TMR) 51 - Up to Two Low-Power 32-Bit Timers (LPTMR) 52 - One I2S Master/Slave for Digital Audio Interface 53 - 12-Channel, 12-Bit, 1Msps SAR ADC with On-DieTemperature Sensor 54 55 - Security and Integrity 56 57 - Optional ECDSA-Based Cryptographic SecureBootloader in ROM 58 - Secure Cryptographic Accelerator for Elliptic Curve 59 - AES-128/192/256 Hardware Acceleration Engine 60 61- Benefits and Features of MAX32672EVKIT: 62 63 - Selectable, On-Board, High-Precision Voltage Reference 64 - 128 x 128 (1.45in) Color TFT Display with SPI Interface 65 - Breadboard-Compatible Headers 66 - USB 2.0 Micro B-to-Serial UARTs 67 - UART0 and LPUART0 Interface Is Selectable through On-Board Jumpers 68 - All GPIOs Signals Accessed through 0.1in Headers 69 - 12 Analog Inputs Accessed through 0.1in Headers with Optional Filtering 70 - 10-Pin Arm® Cortex® SWD Connector 71 - Board Power Provided by USB Port 72 - On-Board, 3.3V LDO Regulator 73 - Test Loops Provided to Supply Optional VCORE Power Externally 74 - Individual Power Measurement on All IC Rails through Jumpers 75 - Two General-Purpose LEDs and One General-Purpose Pushbutton Switch 76 77Supported Features 78================== 79 80Below interfaces are supported by Zephyr on MAX32672EVKIT. 81 82+-----------+------------+-------------------------------------+ 83| Interface | Controller | Driver/Component | 84+===========+============+=====================================+ 85| NVIC | on-chip | nested vector interrupt controller | 86+-----------+------------+-------------------------------------+ 87| SYSTICK | on-chip | systick | 88+-----------+------------+-------------------------------------+ 89| CLOCK | on-chip | clock and reset control | 90+-----------+------------+-------------------------------------+ 91| GPIO | on-chip | gpio | 92+-----------+------------+-------------------------------------+ 93| UART | on-chip | serial | 94+-----------+------------+-------------------------------------+ 95| TRNG | on-chip | entropy | 96+-----------+------------+-------------------------------------+ 97| I2C | on-chip | i2c | 98+-----------+------------+-------------------------------------+ 99| DMA | on-chip | dma controller | 100+-----------+------------+-------------------------------------+ 101| Watchdog | on-chip | watchdog | 102+-----------+------------+-------------------------------------+ 103| SPI | on-chip | spi | 104+-----------+------------+-------------------------------------+ 105| ADC | on-chip | adc | 106+-----------+------------+-------------------------------------+ 107| Timer | on-chip | counter | 108+-----------+------------+-------------------------------------+ 109| PWM | on-chip | pwm | 110+-----------+------------+-------------------------------------+ 111| Flash | on-chip | flash | 112+-----------+------------+-------------------------------------+ 113 114 115Connections and IOs 116=================== 117 118+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 119| Name | Name | Settings | Description | 120+===========+===============+===============+==================================================================================================+ 121| JP1 | VREF | | | 122| | | +-----------+ | +-------------------------------------------------------------------------------+ | 123| | | | Open | | | Disconnects on-board, high-precision voltage reference. | | 124| | | +-----------+ | +-------------------------------------------------------------------------------+ | 125| | | | Closed | | | Connects on-board, high-precision voltage reference. | | 126| | | +-----------+ | +-------------------------------------------------------------------------------+ | 127| | | | | 128+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 129| JP2 | P0_22 | +-----------+ | +-------------------------------------------------------------------------------+ | 130| | | | Open | | | Disconnects red LED D1 from P0_22. | | 131| | | +-----------+ | +-------------------------------------------------------------------------------+ | 132| | | | Closed | | | Connects red LED D1 to P0_22. | | 133| | | +-----------+ | +-------------------------------------------------------------------------------+ | 134| | | | | 135+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 136| JP3 | P0_23 | +-----------+ | +-------------------------------------------------------------------------------+ | 137| | | | Open | | | Disconnects green LED D2 from P0_23. | | 138| | | +-----------+ | +-------------------------------------------------------------------------------+ | 139| | | | Closed | | | Connects green LED D2 to P0_23. | | 140| | | +-----------+ | +-------------------------------------------------------------------------------+ | 141| | | | | 142+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 143| JP4 | I2C0_SCL | +-----------+ | +-------------------------------------------------------------------------------+ | 144| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C0_SCL. | | 145| | | +-----------+ | +-------------------------------------------------------------------------------+ | 146| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C0_SCL. | | 147| | | +-----------+ | +-------------------------------------------------------------------------------+ | 148| | | | | 149+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 150| JP5 | I2C0_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | 151| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C0_SDA. | | 152| | | +-----------+ | +-------------------------------------------------------------------------------+ | 153| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C0_SDA. | | 154| | | +-----------+ | +-------------------------------------------------------------------------------+ | 155| | | | | 156+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 157| JP6 | I2C1_SCL | +-----------+ | +-------------------------------------------------------------------------------+ | 158| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C1_SCL. | | 159| | | +-----------+ | +-------------------------------------------------------------------------------+ | 160| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C1_SCL. | | 161| | | +-----------+ | +-------------------------------------------------------------------------------+ | 162| | | | | 163+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 164| JP7 | I2C1_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | 165| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C1_SDA. | | 166| | | +-----------+ | +-------------------------------------------------------------------------------+ | 167| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C1_SDA. | | 168| | | +-----------+ | +-------------------------------------------------------------------------------+ | 169| | | | | 170+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 171| JP8 | I2C2_SCL | +-----------+ | +-------------------------------------------------------------------------------+ | 172| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C2_SCL. | | 173| | | +-----------+ | +-------------------------------------------------------------------------------+ | 174| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C2_SCL. | | 175| | | +-----------+ | +-------------------------------------------------------------------------------+ | 176| | | | | 177+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 178| JP9 | I2C2_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | 179| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C2_SDA. | | 180| | | +-----------+ | +-------------------------------------------------------------------------------+ | 181| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C2_SDA. | | 182| | | +-----------+ | +-------------------------------------------------------------------------------+ | 183| | | | | 184+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 185| JP10 | UART_RX | +-----------+ | +-------------------------------------------------------------------------------+ | 186| | | | 2-1 | | | Connects the USB serial bridge to UART0_RX (P0.8). | | 187| | | +-----------+ | +-------------------------------------------------------------------------------+ | 188| | | | 2-3 | | | Connects the USB serial bridge to LUART0_RX (P0.26). | | 189| | | +-----------+ | +-------------------------------------------------------------------------------+ | 190| | | | | 191+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 192| JP11 | UART_TX | +-----------+ | +-------------------------------------------------------------------------------+ | 193| | | | 2-1 | | | Connects the USB serial bridge to UART0_TX (P0.9). | | 194| | | +-----------+ | +-------------------------------------------------------------------------------+ | 195| | | | 2-3 | | | Connects the USB serial bridge to LUART0_TX (P0.27). | | 196| | | +-----------+ | +-------------------------------------------------------------------------------+ | 197| | | | | 198+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 199| JP12 | VDDA | +-----------+ | +-------------------------------------------------------------------------------+ | 200| | | | Open | | | Disconnects power from VDDA. | | 201| | | +-----------+ | +-------------------------------------------------------------------------------+ | 202| | | | Closed | | | Connects power to VDDA. | | 203| | | +-----------+ | +-------------------------------------------------------------------------------+ | 204| | | | | 205+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 206| JP13 | VDD | +-----------+ | +-------------------------------------------------------------------------------+ | 207| | | | Open | | | Disconnects power from VDD. | | 208| | | +-----------+ | +-------------------------------------------------------------------------------+ | 209| | | | Closed | | | Connects power to VDD. | | 210| | | +-----------+ | +-------------------------------------------------------------------------------+ | 211| | | | | 212+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 213| JP14 | VCORE | +-----------+ | +----------------------------------------------------------------------------------+ | 214| | | | Open | | | Disconnects power from VCORE from an external power supply through test loop TP6.| | 215| | | +-----------+ | +----------------------------------------------------------------------------------+ | 216| | | | Closed | | | Connects power to VCORE from an external power supply through test loop TP6. | | 217| | | +-----------+ | +----------------------------------------------------------------------------------+ | 218| | | | | 219+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 220| JP15 | LDO DUT | +-----------+ | +-------------------------------------------------------------------------------+ | 221| | | | Open | | | Disconnects power from 3.3V LDO. | | 222| | | +-----------+ | +-------------------------------------------------------------------------------+ | 223| | | | Closed | | | Connects power to 3.3V LDO. | | 224| | | +-----------+ | +-------------------------------------------------------------------------------+ | 225| | | | | 226+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 227 228 229Detailed Description of Hardware 230================================ 231 232Power Supply 233************ 234 235The EV kit is powered by +5V, which is made available through VBUS on the Micro USB type-B 236connector CN1. The blue VBUS LED (DS1) and the green 3.3V LED will illuminate 237when the board is powered. 238 239Single- or Dual-Supply Operation 240******************************** 241 242The EV kit is configured for single-supply operation. For dual-supply operation, 243install a jumper on JP14 and connect an external supply to TP6 (VCORE_EXT) and ground. 244Refer to the MAX32672 data sheet for acceptable voltage values. 245 246Current Monitoring 247****************** 248 249Two pin headers provide convenient current monitoring points for VDDA EN (JP12), VDD EN (JP13), 250and VCORE EN (JP14). JP14 is only used for current measurements when VCORE is supplied externally. 251 252Low-Power Mode Current Measurements 253*********************************** 254 255To accurately achieve the low-power current values, the EV kit must be configured such that 256no outside influence (such as a pullup, external clock, or debugger connector) causes 257a current source or sink on that GPIO. For these measurements, the board will be needed to be 258configured as follows: 259 2601. Remove jumpers JP2 through JP11. 2612. Set SW2 to the DIS position and remove resistor R12. 2623. Unplug the SWD connector. 263 264Clocking 265******** 266 267The MAX32672 clocking is provided by an external 16MHz crystal (Y1). 268 269External Voltage Reference 270************************** 271 272The external voltage reference input VREF for the ADC can be sourced externally by a high-precision 273external reference source (the MAX6071). VREF (JP1) allows the external reference 274to be disconnected so that VREF can be sourced internally by VDDA. 275 276 277UART Interface 278************** 279 280The EV kit provides a USB-to-UART bridge chip (the FTDI FT230XS-R). This bridge eliminates 281the requirement for a physical RS-232 COM port. Instead, the IC’s UART access is through 282the Micro USB type-B connector (CN1). The USB-to-UART bridge can be connected to the IC’s UART0 or 283LPUART0 with jumpers JP10 (RX0) and JP11 (TX0). Virtual COM port drivers and guides for 284installing Windows® drivers are available on the FTDI Chip website. 285 286 287Boot Loader 288*********** 289 290The boot loader is activated by the boot-load-enable slide switch (SW2). 291This pulls P0_10 low and, upon a power cycle or reset, the device will enter boot loader mode. 292 293GPIO and Alternate Function Headers 294*********************************** 295 296GPIO and alternate function signals from the MAX32672 297can be accessed through 0.1in-spaced headers J3 and J4. 298 299 300Analog Headers 301************** 302 303The 12 analog inputs can be accessed through 0.1inspaced headers JH1, JH2, and JH3. 304 305 306I2C Pullups 307*********** 308 309The I2C ports can independently pulled up to V_AUX (3.3V default) through JP4 (I2C0_CL_PU) and JP5 310(I2C0_DA_PU), JP6 (I2C1_CL_PU) and JP7 (I2C1_DA_PU), and JP8 (I2C2_CL_PU) and JP9 (I2C2_DA_PU). 311 312Programming and Debugging 313************************* 314 315The IC can be reset by pushbutton SW1. 316 317 318Programming and Debugging 319************************* 320 321Flashing 322======== 323 324SWD debug can be accessed through an Arm Cortex 10-pin connector (J5). 325Logic levels are set to 3V3 by default, but they can be set to 1.8V if TP5 (VDD_VDDA_EXT) 326is supplied externally. Be sure to remove jumper JP15 (LDO_DUT_EN) to disconnect the 3.3V 327LDO if supplying VDD and VDDA externally. 328 329Once the debug probe is connected to your host computer, then you can simply run the 330``west flash`` command to write a firmware image into flash. 331 332.. note:: 333 334 This board uses OpenOCD as the default debug interface. You can also use 335 a Segger J-Link with Segger's native tooling by overriding the runner, 336 appending ``--runner jlink`` to your ``west`` command(s). The J-Link should 337 be connected to the standard 2*5 pin debug connector (JH2) using an 338 appropriate adapter board and cable. 339 340Debugging 341========= 342 343Please refer to the `Flashing`_ section and run the ``west debug`` command 344instead of ``west flash``. 345 346References 347********** 348 349- `MAX32672EVKIT web page`_ 350 351.. _MAX32672EVKIT web page: 352 https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/max32672evkit.html 353
