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/Zephyr-latest/dts/bindings/misc/
Dzephyr,modbus-serial.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,modbus-serial"
8 include: uart-device.yaml
11 de-gpios:
12 type: phandle-array
15 Driver enable pin (DE) of the RS-485 transceiver.
17 as active high.
19 re-gpios:
20 type: phandle-array
23 Receiver enable pin (nRE) of the RS-485 transceiver.
[all …]
/Zephyr-latest/dts/bindings/display/panel/
Dpanel-timing.yaml2 # SPDX-License-Identifier: Apache-2.0
9 a panel under display-timings node. For example:
12 display-timings {
13 compatible = "zephyr,panel-timing";
14 hsync-len = <8>;
15 hfront-porch = <32>;
16 hback-porch = <32>;
17 vsync-len = <2>;
18 vfront-porch = <16>;
19 vback-porch = <14>;
[all …]
/Zephyr-latest/boards/shields/rk043fn02h_ct/
Drk043fn02h_ct.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/display/panel.h>
16 compatible = "zephyr,lvgl-pointer-input";
26 int-gpios = <&nxp_i2c_touch_fpc 2 GPIO_ACTIVE_LOW>;
34 display-timings {
35 compatible = "zephyr,panel-timing";
36 hsync-len = <41>;
37 hfront-porch = <4>;
38 hback-porch = <8>;
39 vsync-len = <10>;
[all …]
/Zephyr-latest/boards/shields/rk043fn66hs_ctg/
Drk043fn66hs_ctg.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/display/panel.h>
16 compatible = "zephyr,lvgl-pointer-input";
26 irq-gpios = <&nxp_i2c_touch_fpc 2 GPIO_ACTIVE_HIGH>;
27 reset-gpios = <&nxp_i2c_touch_fpc 1 GPIO_ACTIVE_LOW>;
35 display-timings {
36 compatible = "zephyr,panel-timing";
37 hsync-len = <4>;
38 hfront-porch = <8>;
39 hback-porch = <43>;
[all …]
/Zephyr-latest/boards/shields/rtkmipilcdb00000be/
Drtkmipilcdb00000be.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/display/panel.h>
15 compatible = "zephyr,lvgl-pointer-input";
22 gt911_rtkmipilcdb00000be: gt911-rtkmipilcdb00000be@5d {
25 irq-gpios = <&renesas_mipi_connector 17 GPIO_ACTIVE_HIGH>;
26 reset-gpios = <&renesas_mipi_connector 18 GPIO_ACTIVE_LOW>;
34 compatible = "ilitek,ili9806e-dsi";
38 data-lanes = <2>;
39 pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
47 input-pixel-format = <PANEL_PIXEL_FORMAT_RGB_888>;
[all …]
/Zephyr-latest/boards/shields/st_b_lcd40_dsi1_mb1166/
Dst_b_lcd40_dsi1_mb1166.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/display/panel.h>
11 compatible = "zephyr,lvgl-pointer-input";
13 invert-y;
29 reset-gpios = <&dsi_lcd_qsh_030 57 GPIO_ACTIVE_HIGH>;
30 bl-gpios = <&dsi_lcd_qsh_030 53 GPIO_ACTIVE_HIGH>;
31 data-lanes = <2>;
32 pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
41 pixel-format = <PANEL_PIXEL_FORMAT_RGB_888>;
43 display-timings {
[all …]
Dst_b_lcd40_dsi1_mb1166_a09.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/display/panel.h>
11 compatible = "zephyr,lvgl-pointer-input";
13 invert-y;
29 reset-gpios = <&dsi_lcd_qsh_030 57 GPIO_ACTIVE_HIGH>;
30 bl-gpios = <&dsi_lcd_qsh_030 53 GPIO_ACTIVE_HIGH>;
31 data-lanes = <2>;
32 pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
41 pixel-format = <PANEL_PIXEL_FORMAT_RGB_888>;
43 display-timings {
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/Zephyr-latest/boards/shields/st_b_lcd40_dsi1_mb1166/boards/
Dstm32h747i_disco_stm32h747xx_m7.overlay4 * SPDX-License-Identifier: Apache-2.0
9 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
14 ext-sdram = <&sdram2>;
15 def-back-color-red = <0>;
16 def-back-color-green = <0>;
17 def-back-color-blue = <0>;
24 div-m = <5>;
25 mul-n = <132>;
26 div-p = <2>;
27 div-q = <2>;
[all …]
/Zephyr-latest/dts/bindings/mipi-dsi/
Dst,stm32-mipi-dsi.yaml4 # SPDX-License-Identifier: Apache-2.0
9 compatible: "st,stm32-mipi-dsi"
11 include: [mipi-dsi-host.yaml, reset-device.yaml]
17 clock-names:
28 hs-active-high:
31 DSI host horizontal synchronization is active high.
33 vs-active-high:
36 DSI host vertical synchronization is active high.
38 de-active-high:
41 DSI host data enable is active high.
[all …]
/Zephyr-latest/boards/renesas/da1469x_dk_pro/dts/
Dda1469x_dk_pro_lcdc.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
8 #include <zephyr/dt-bindings/display/panel.h>
19 swap-xy;
28 bias-pull-up;
36 bias-pull-up;
42 clock-frequency = <400000>;
49 int-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
55 pinctrl-0 = <&display_controller_default>;
56 pinctrl-1 = <&display_controller_sleep>;
[all …]
/Zephyr-latest/dts/bindings/serial/
Dnxp,lpuart.yaml5 include: [uart-controller.yaml, uart-controller-pin-inversion.yaml, pinctrl-device.yaml]
18 single-wire:
21 Enable the single wire half-duplex communication.
26 nxp,rs485-mode:
30 of an external RS-485 transceiver. Note hw-flow-control should be
33 nxp,rs485-de-active-low:
/Zephyr-latest/boards/shields/rk055hdmipi4ma0/
Drk055hdmipi4ma0.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/display/panel.h>
15 en_mipi_display_rk055hdmipi4ma0: enable-mipi-display-rk055hdmipi4ma0 {
16 compatible = "regulator-fixed";
17 regulator-name = "en_mipi_display";
18 enable-gpios = <&nxp_mipi_connector 32 GPIO_ACTIVE_HIGH>;
19 regulator-boot-on;
23 compatible = "zephyr,lvgl-pointer-input";
30 gt911_rk055hdmipi4ma0: gt911-rk055hdmipi4ma0@5d {
33 irq-gpios = <&nxp_mipi_connector 29 GPIO_ACTIVE_HIGH>;
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/Zephyr-latest/boards/shields/rk055hdmipi4m/
Drk055hdmipi4m.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/display/panel.h>
15 en_mipi_display: enable-mipi-display {
16 compatible = "regulator-fixed";
17 regulator-name = "en_mipi_display";
18 enable-gpios = <&nxp_mipi_connector 32 GPIO_ACTIVE_HIGH>;
19 regulator-boot-on;
23 compatible = "zephyr,lvgl-pointer-input";
33 irq-gpios = <&nxp_mipi_connector 29 GPIO_ACTIVE_HIGH>;
34 reset-gpios = <&nxp_mipi_connector 28 GPIO_ACTIVE_LOW>;
[all …]
/Zephyr-latest/subsys/mgmt/osdp/
DKconfig.pd4 # SPDX-License-Identifier: Apache-2.0
43 channel with default SCBK. Once as secure channel is active with the
78 A 4-byte serial number for the PD.
86 - Bit 0-7 : build version number;
87 - Bit 8-15 : minor version number;
88 - Bit 16-23: major version number;
102 - 01: PD monitors and reports the state of the circuit without any
104 interpretation of contact state to active/inactive status.
105 - 02: Like 01, plus: The PD accepts configuration of the encoding of the
106 open/closed circuit status to the reported active/inactive status. (User
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/Zephyr-latest/subsys/net/l2/ieee802154/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
18 module-dep = NET_LOG
19 module-str = Log level for IEEE 802.15.4
20 module-help = Enables IEEE 802.15.4 code to output debug messages.
31 prompt "Which packet do you want to print-out?"
36 bool "Print-out both RX and TX packets"
38 This will print-out both received and transmitted packets.
41 bool "Print-out only RX packets"
43 This will print-out received packets only.
46 bool "Print-out only TX packets"
[all …]
/Zephyr-latest/boards/st/stm32f746g_disco/
Dstm32f746g_disco.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f7/stm32f746nghx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
17 compatible = "st,stm32f746g-disco";
21 zephyr,shell-uart = &usart1;
25 zephyr,flash-controller = &n25q128a1;
31 compatible = "gpio-leds";
[all …]
/Zephyr-latest/boards/st/stm32f429i_disc1/
Dstm32f429i_disc1.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <st/f4/stm32f429zitx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/display/ili9xxx.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
20 zephyr,shell-uart = &usart1;
29 compatible = "zephyr,memory-region", "mmio-sram";
32 zephyr,memory-region = "SDRAM2";
36 compatible = "gpio-leds";
48 compatible = "gpio-keys";
[all …]
/Zephyr-latest/boards/st/stm32f7508_dk/
Dstm32f7508_dk.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <st/f7/stm32f750n8hx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 model = "STMicroelectronics STM32F7508-DK";
21 zephyr,shell-uart = &usart1;
25 zephyr,flash-controller = &n25q128a1;
31 compatible = "gpio-leds";
39 compatible = "gpio-keys";
[all …]
/Zephyr-latest/boards/st/stm32h750b_dk/
Dstm32h750b_dk.dts2 * Copyright (c) 2023-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h750xbhx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 compatible = "st,stm32h750b-dk";
19 zephyr,shell-uart = &usart3;
22 zephyr,flash-controller = &mt25ql512ab1;
27 compatible = "zephyr,memory-region", "mmio-sram";
30 zephyr,memory-region = "SDRAM2";
[all …]
/Zephyr-latest/boards/st/stm32h7b3i_dk/
Dstm32h7b3i_dk.dts2 * Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b3lihxq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "st,stm32h7b3i-dk";
20 zephyr,shell-uart = &usart1;
29 compatible = "gpio-leds";
41 compatible = "gpio-keys";
[all …]
/Zephyr-latest/drivers/spi/
Dspi_xlnx_axi_quadspi.c4 * SPDX-License-Identifier: Apache-2.0
105 const struct xlnx_quadspi_config *config = dev->config; in xlnx_quadspi_read32()
107 return sys_read32(config->base + offset); in xlnx_quadspi_read32()
114 const struct xlnx_quadspi_config *config = dev->config; in xlnx_quadspi_write32()
116 sys_write32(value, config->base + offset); in xlnx_quadspi_write32()
121 const struct xlnx_quadspi_config *config = dev->config; in xlnx_quadspi_cs_control()
122 struct xlnx_quadspi_data *data = dev->data; in xlnx_quadspi_cs_control()
123 struct spi_context *ctx = &data->ctx; in xlnx_quadspi_cs_control()
124 uint32_t spissr = BIT_MASK(config->num_ss_bits); in xlnx_quadspi_cs_control()
127 /* Skip slave select assert/de-assert in slave mode */ in xlnx_quadspi_cs_control()
[all …]
/Zephyr-latest/drivers/wifi/esp32/
DKconfig.esp3227 Make sure there is a minimal heap available for Wi-Fi driver.
46 bool "Activates the Station/AP co-existence mode."
108 initialized and released when WiFi is de-initialized. The size of each
185 when WiFi is de-initialized. The size of each static RX MGMT buffer is fixed to about 500 Bytes.
282 Select this option to place frequently called Wi-Fi library functions in IRAM.
284 but Wi-Fi throughput will be reduced.
290 Select this option to place frequently called Wi-Fi library RX functions in IRAM.
292 but Wi-Fi performance will be reduced.
301 int "Minimum active time"
305 …Only for station in WIFI_PS_MIN_MODEM or WIFI_PS_MAX_MODEM. When the station enters the active sta…
[all …]
/Zephyr-latest/boards/witte/linum/
Dlinum.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h753bitx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
18 zephyr,shell-uart = &usart1;
22 zephyr,code-partition = &slot0_partition;
27 compatible = "zephyr,memory-region", "mmio-sram";
30 zephyr,memory-region = "SDRAM1";
31 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
35 compatible = "gpio-leds";
[all …]
/Zephyr-latest/dts/bindings/pinctrl/
Dambiq,apollo4-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
19 /* You can put this in places like a board-pinctrl.dtsi file in
23 /* include pre-defined combinations for the SoC variant used by the board */
24 #include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h>
33 input-enable;
39 particular state of a device; in this case, the default (that is, active)
47 pins, such as the 'input-enable' property in group 2.
49 compatible: "ambiq,apollo4-pinctrl"
53 child-binding:
56 child-binding:
[all …]
/Zephyr-latest/drivers/fpga/
Dfpga_ice40_bitbang.c5 * SPDX-License-Identifier: Apache-2.0
25 * CS polarity is normal (active low). Zephyr's SPI driver model currently
30 * restore the default pinctrl settings. On some higher-end microcontrollers
34 * However, on lower-end microcontrollers, the amount of time that elapses
36 * leaves us with the bitbanging option. Of course, on lower-end
40 * in order to bitbang on lower-end microcontrollers, we actually require
61 * lattice,ice40-fpga.yaml for details.
65 for (; n > 0; --n) { in fpga_ice40_delay()
73 for (; n > 0; --n) { in fpga_ice40_send_clocks()
88 /* assert chip-select (active low) */ in fpga_ice40_spi_send_data()
[all …]

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